參數(shù)資料
型號(hào): V53C516405A60
廠商: Mosel Vitelic, Corp.
英文描述: 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM
中文描述: 4米× 4 EDO公司頁面模式的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁數(shù): 5/24頁
文件大?。?/td> 170K
代理商: V53C516405A60
5
MOSEL V ITELIC
AC Characteristics
T
A
= 0 to 70 C,V
V53C516405A
V53C516405A Rev. 1.1 March 1998
(5, 6)
CC
= 5 V
±
10 %, t
T
= 2 ns
#
Symbol
Parameter
-50
-60
Unit
Note
min.
max.
min.
max.
Common Parameters
1
t
RC
Random read or write cycle time
84
104
ns
2
t
RP
RAS precharge time
30
40
ns
3
t
RAS
RAS pulse width
50
10k
60
10k
ns
4
t
CAS
CAS pulse width
8
10k
10
10k
ns
5
t
ASR
Row address setup time
0
0
ns
6
t
RAH
Row address hold time
8
10
ns
7
t
ASC
Column address setup time
0
0
ns
8
t
CAH
Column address hold time
8
10
ns
9
t
RCD
RAS to CAS delay time
12
37
14
45
ns
10
t
RAD
RAS to column address delay
10
25
12
30
ns
11
t
RSH
RAS hold time
13
15
ns
12
t
CSH
CAS hold time
40
50
ns
13
t
CRP
CAS to RAS precharge time
5
5
ns
14
t
T
Transition time (rise and fall)
1
50
1
50
ns
7
15
t
REF
Refresh period
64
64
ms
Read Cycle
16
t
RAC
Access time from RAS
50
60
ns
8, 9
17
t
CAC
Access time from CAS
13
15
ns
8, 9
18
t
CAA
Access time from column address
25
30
ns
8,10
19
t
OEA
OE access time
13
15
ns
20
t
RAL
Column address to RAS lead time
25
30
ns
21
t
RCS
Read command setup time
0
0
ns
22
t
RCH
Read command hold time
0
0
ns
11
23
t
RRH
Read command hold time referenced to RAS
0
0
ns
11
24
t
CLZ
CAS to output in low-Z
0
0
ns
8
25
t
OFF
Output buffer turn-off delay
0
13
0
15
ns
12
26
t
OEZ
Output turn-off delay from OE
0
13
0
15
ns
12
27
t
DZC
Data to CAS low delay
0
0
ns
13
28
t
DZO
Data to OE low delay
0
0
ns
13
29
t
CDD
CAS high to data delay
10
13
ns
14
30
t
ODD
OE high to data delay
10
13
ns
14
相關(guān)PDF資料
PDF描述
V53C516405AK50 DRAM|EDO|4MX4|CMOS|SOJ|26PIN|PLASTIC
V53C516405AK60 DRAM|EDO|4MX4|CMOS|SOJ|26PIN|PLASTIC
V53C516405AT50 DRAM|EDO|4MX4|CMOS|TSOP|26PIN|PLASTIC
V53C516405AT60 DRAM|EDO|4MX4|CMOS|TSOP|26PIN|PLASTIC
V53C516405A 4M x 4 EDO Page Mode CMOS Dynamic RAM(4Mx4EDO頁面模式CMOS動(dòng)態(tài)RAM)
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