參數(shù)資料
型號(hào)： V54C365804VB
廠商： Mosel Vitelic, Corp.
英文描述： High Performance PC100/125MHz 3.3 Volt 8M X 8 Synchronous DRAM(3.3V高性能pc100/125MHz 8Mx8同步動(dòng)態(tài)RAM)
中文描述： 高性能PC100/125MHz 3.3伏8米× 8同步DRAM（3.3V的高性能pc100/125MHz 8Mx8同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 14/54頁(yè)
文件大小： 457K
代理商： V54C365804VB
14
V54C365804VB Rev. 1.1 February 1999
MOSEL V ITELIC
V54C365804VB
Notes for AC Parameters:
1.
For proper power-up see the operation section of this data sheet.
2.
AC timing tests have V
IL
= 0.8V and V
IH
= 2.0V with the timing referenced to the 1.4 V crossover point. The transition
time is measured between V
IH
and V
IL
. All AC measurements assume t
T
= 1ns with the AC output load circuit
shown in Figure 1.
4.
If clock rising time is longer than 1 ns, a time (t
T
/2 – 0.5) ns has to be added to this parameter.
5.
If t
T
is longer than 1 ns, a time (t
T
– 1) ns has to be added to this parameter.
6.
These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as
follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command
is registered.
7.
Referenced to the time which the output achieves the open circuit condition, not to output voltage levels
1.4V
1.4V
tCS
tCH
tAC
tAC
tLZ
tOH
tHZ
CLK
COMMAND
OUTPUT
50 pF
I/O
Z=50 Ohm
+ 1.4 V
50 Ohm
VIH
VIL
t
T
Figure 1.
tCK
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