![](http://datasheet.mmic.net.cn/200000/V91F565U24QCFW-F5_datasheet_15112886/V91F565U24QCFW-F5_6.png)
V91F565U24QC Rev 1.0 May 2007
6
V91F565U24QC
ProMOS TECHNOLOGIES
FB-DIMM Operation Overview
FB-DIMM(Fully Buffered Dual in Line Memory Module) is a high-bandwidth, large capacity channel solution
that utilizes a narrow host interface. Its serial link interface with packet data format and dedicated read/write
paths are main element of the FBDIMM protocol, which is very much different than the registered DIMM and
Unbuffered DIMM. The architecture includes the AMB (Advanced Memory Buffer) that isolates the DDR2
SDRAM device from the channel. This single-chip AMB component, located in the center of each FBDIMM,
acts as a repeater and buffer for all signals and commands exchanged betwenn the host controller and
DDR2 SDRAM devices. The AMB communicates with the host controller and adjacent FBDIMMs on a sys-
tem that using high speed 1.5V industrial-standard differential Point-to-Point interface. The AMB interface is
responsible for handling all transaction to and from the local FBDIMM and for forwarding requests to other
FBDIMMs on the memory channel.
Advanced Memory Buffer (AMB)
The AMB is a memory interface that connects the DDR2 SDRAM devices to the FBDIMM channel. The AMB
is a slave device on the channel responding to channel commands and forwarding channel commands to
the other AMB devices.
The AMB is expected to perform the following functions:
_Support channel initialization procedures as defined in the initialization section of the FBDIMM chi-
tecture and Protocol Specification to align the clokcs and the fame boundaries and verigy channel
connectivity
_Support the forwarding of southbound and northbound frames, servicing requests directed to a spe-
cific FBDIMM’s AMB, as defined in the protocol chapter of the specification, and merging the return
data into the northbound frames
_If the AMB resides on the last DIMM in the channel, the AMB initializes northbound frames
_Detects errors on the channel and reports them to the host memory controller
_Supports the FBDIMM configuration register set as defined in the FBDIMM AMB specification reg-
ister chapter of the specification
_Acts as DRAM memory buffer for all read, write and configuration accesses addressed to the DIMM
_Provide a read and write buffer FIFO
_Support an SMBus protocol interface for access to the AMB configuration registers
_Provide features to support MEMBIST and IBISt test functions
_Provide a register interface for the thermal sensor and status indicator
_Function as a repeater to extend the maximum length of the FBDIMM Links
_Reconfigures FBDIMM inputs from differential high speed link receivers to two single ended lower
speed receivers (~200 MHz). These inputs directly control DDR2 command/address and input data
that replicated to all DRAMs
_Uses low speed direct drive FBDINMM outputs to bypass high speed Parallel/Serial circuitry and
provide test results back to tester