參數(shù)資料
型號(hào)： VNC2-48L1B-REEL
廠商： FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù)： 22/88頁(yè)
文件大?。?/td> 0K
描述： IC USB HOST/DEVICE CTRL 48-LQFP
應(yīng)用說(shuō)明： Vinculum-II IO Cell Description AppNote
Vinculum-II Debug Interface Description AppNote
Vinculum-II IO Mux Explained AppNote
Vinculum-II PWM Example AppNote
Migrating Vinculum Designs AppNote
特色產(chǎn)品： Vinculum VNC2
標(biāo)準(zhǔn)包裝： 1
系列： Vinculum-II
控制器類型： USB 2.0 控制器
接口： USB，主機(jī)/設(shè)備配置，UART，SPI，PWM，閃存 256K，DMA 4CH
電源電壓： 1.62 V ~ 1.98 V
電流 - 電源： 25mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 634 (CN2011-ZH PDF)
其它名稱： 768-1049-6
29
Copyright 2009-2011 Future Technology Devices International Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.5
Document No.: FT_000138 Clearance No.: FTDI# 143
5.1 I/O Peripherals Signal Names
Peripheral
Signal Name
Outputs
Inputs
Description
Debugger
debug_if
1
debugger interface
UART
uart_txd
1
0
Transmit asynchronous data output
uart_rts#
1
0
Request to send control output
uart_dtr#
1
0
Data acknowledge (data terminal ready control) output
uart_tx_active
1
0
Enable transmit data for RS485 designs
uart_rxd
0
1
Receive asynchronous data input
uart_cts#
0
1
Clear to send control input
uart_dsr#
0
1
Data request (data set ready control) input
uart_ri#
0
1
Ring indicator control input
uart_dcd#
0
1
Data carrier detect control input
FIFO
fifo_data
8
FIFO data bus
fifo_txe#
1
0
When high, do not write data into the FIFO. When low,
data can be written into the FIFO by strobing WR high,
then low.
fifo_rxf#
1
0
When high, do not read data from the FIFO. When low,
there is data available in the FIFO which can be read by
strobing RD# low, then high.
fifo_wr#
0
1
Writes the data byte on the D0...D7 pins into the
transmit FIFO buffer when WR goes from high to low.
fifo_rd#
0
1
Enables the current FIFO data byte on D0...D7 when low.
Fetches the next FIFO data byte (if available) from the
receive FIFO buffer when RD# goes from high to low
fifo_oe#
0
1
FIFO output enable – synchronous FIFO only
fifo_clkout
0
1
FIFO clock out – synchronous FIFO only
GPIO
gpio
40
General purpose I/O
SPI Slave 0
spi_s0_clk
0
1
SPI clock input – slave 0
spi_s0_ss#
0
1
SPI chip select input – slave 0
spi_s0_mosi
1
SPI master out serial in – slave 0
spi_s0_miso
1
0
SPI master in slave out – slave 0
SPI Slave 1
spi_s1_clk
0
1
SPI clock input – slave 1
spi_s1_ss#
0
1
SPI chip select input – slave 1
spi_s1_mosi
1
Master out slave in – slave 1
spi_s1_miso
1
0
Master in slave out – slave 1
SPI Master
spi_m_clk
1
0
SPI clock input – master
spi_m_mosi
1
Master out slave in - master
spi_m_miso
0
1
Master in slave out - master
spi_m_ss_0#
1
0
Active low slave select 0 from master to slave 0
spi_m_ss_1#
1
0
Active low slave select 1 from master to slave 1
PWM
pwm
8
0
Pulse width modulation
Table 5.1 I/O Peripherals Signal Names
Note: # is used to indicate an active low signal.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VNC2-48L1B-TRAY 功能描述:USB 接口集成電路 Vinculum-II Dual Host/Dev IC LQFP-48 RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
VNC2-48L1C-REEL
VNC2-48L1C-TRAY 功能描述:IC USB HOST/DEVICE CTRL 48-LQFP 制造商:ftdi, future technology devices international ltd 系列:Vinculum-II 包裝:托盤(pán) 零件狀態(tài):在售 協(xié)議:USB 功能:控制器 接口:SPI，UART 標(biāo)準(zhǔn):USB 2.0 電壓 - 電源:1.8V， 3.3V 電流 - 電源:25mA 工作溫度:-40°C ~ 85°C 封裝/外殼:48-LQFP 供應(yīng)商器件封裝:48-LQFP（7x7） 標(biāo)準(zhǔn)包裝:250
VNC2-48Q1A-REEL 功能描述:USB 接口集成電路 Obsolete see VNC2-48Q1B-REEL RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
VNC2-48Q1A-TRAY 功能描述:USB 接口集成電路 Obsolete see VNC2-48Q1B-TRAY RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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