參數(shù)資料
型號(hào)： VSC6511
廠商： Vitesse Semiconductor Corporation.
英文描述： SMPTE-292M Serializer, Deserializer, and Deserializer/Reclocker at 1.485Gb/s
中文描述： 的SMPTE - 292M的串行器，解串器，并串器/時(shí)鐘恢復(fù)器/在1.485Gb ?
文件頁(yè)數(shù)： 12/22頁(yè)
文件大?。?/td> 379K
代理商： VSC6511
VITESSE
Advance Product Information
Deserializer/Reclocker at 1.485Gb/s
SMPTE-292M Serializer, Deserializer, and
VSC6511
Page 12
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
4/10/00
G52311-0, Rev 2.0
D
Features: Deserializer / Reclocker Mode
1.
Compliant with SMPTE-292M @ 1.485Gb/s
2.
Clock and Data Recovery
3.
1:20 Deserializer
4.
Descrambler and NRZI Decoder with ENABLE
5.
Data Framer aligns data to SAV/EAV
6.
2 or 4 User Configurable 75 ohm cable driver outputs
7.
On-chip Clock Multiplier Unit
8.
LINE, FRAME, HANC Indication
9.
CRC Checker
10. 20 Bit TTL Interface @ 74.25 MHz
11. On-chip Clock Multiplier and Recovery Unit
12. 3.3V, 900mW -- typical power.
General Description
In the Deserializer/Reclocker Mode, both the Deserializer and the Reclocker are active. All the features of
each function are available with the exception of the reclocker status/control pins on the databus D0 and D2. In
this mode, D[0:19] is used solely for the deserialized recovered data. A
lso, RCLK is used for the deserializer’s
recovered clock and will not provide a buffered version of REFCLK and the BYPASS capability is also not
available.
Figure 7: Block Diagram: Deserializer/Reclocker Mode
LINE
FRAME
HANC
SDI
SDI
Clock
Recovery
Unit
REFCLK
74.25 MHz
Clock
Multiply
x20
1.485 GHz
RCLK
SCREN
1.485 GHz
D[19:0]
SDO0
SDO0
ISET0
SIGDET
OE1
SDO1
SDO1
ISET1
/20
CABLE DRIVER
OUTPUTS
CRC Check
NRZI Decoder
Descrambler
Deserializer
D Q
OE0
Framer
CRCERR
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VSC6511RC 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:SMPTE-292M Serializer, Deserializer, and Deserializer/Reclocker at 1.485Gb/s
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