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參數(shù)資料
| 型號： | VT8371 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | KX133 ATHLON NORTH BRIDGE |
| 中文描述： | KX133速龍北橋 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 147K |
| 代理商： | VT8371 |
VT8371
Preliminary Revision 1.02
, January 7, 2000
-
ii-
Table of Contents
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T
ABLE OF
C
ONTENTS
REVISION HISTORY........................................................................................................................................................................I
TABLE OF CONTENTS..................................................................................................................................................................II
LIST OF FIGURES..........................................................................................................................................................................III
LIST OF TABLES ...........................................................................................................................................................................IV
KX133 AMD ATHLON NORTH BRIDGE.................................................................................................................................1
OVERVIEW.......................................................................................................................................................................................4
PINOUTS............................................................................................................................................................................................6
PIN DESCRIPTIONS........................................................................................................................................................................9
REGISTERS.....................................................................................................................................................................................17
R
EGISTER
O
VERVIEW
.................................................................................................................................................................17
M
ISCELLANEOUS
I/O...................................................................................................................................................................20
C
ONFIGURATION
S
PACE
I/O .......................................................................................................................................................20
R
EGISTER
D
ESCRIPTIONS
............................................................................................................................................................21
Device 0 Header Registers - Host Bridge............................................................................................................................21
Device 0 Configuration Registers - Host Bridge ................................................................................................................23
Host CPU Control................................................................................................................................................................................. 23
DRAM Control ..................................................................................................................................................................................... 24
PCI Bus Control.................................................................................................................................................................................... 30
GART / Graphics Aperture Control...................................................................................................................................................... 34
AGP Control ......................................................................................................................................................................................... 36
Device 1 Header Registers - PCI-to-PCI Bridge................................................................................................................40
Device 1 Configuration Registers - PCI-to-PCI Bridge.....................................................................................................42
AGP Bus Control.................................................................................................................................................................................. 42
ELECTRICAL SPECIFICATIONS...............................................................................................................................................45
A
BSOLUTE
M
AXIMUM
R
ATINGS
.................................................................................................................................................45
DC C
HARACTERISTICS
................................................................................................................................................................45
AC T
IMING
S
PECIFICATIONS
......................................................................................................................................................45
MECHANICAL SPECIFICATIONS.............................................................................................................................................46
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