
VT8371
Preliminary Revision 1.02
, January 7, 2000
-
iv-
List of Tables
7HFKQRORJLHV,QF
'HOLYHULQJ 9DOXH
L
IST OF
T
ABLES
TABLE 1. VT8371 PIN DESCRIPTIONS......................................................................................................................................9
TABLE 2. VT8371 REGISTERS...................................................................................................................................................17
TABLE 3. SYSTEM MEMORY MAP..........................................................................................................................................24
TABLE 4. MEMORY ADDRESS MAPPING TABLE ...............................................................................................................24
TABLE 5. VGA/MDA MEMORY/IO REDIRECTION..............................................................................................................42
TABLE 6. AC TIMING MIN / MAX CONDITIONS..................................................................................................................45