參數(shù)資料
型號： W25Q32BWZPIP
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 4M X 8 SPI BUS SERIAL EEPROM, DSO8
封裝： 6 X 5 MM, GREEN, WSON-8
文件頁數(shù)： 42/72頁
文件大小： 2212K
代理商： W25Q32BWZPIP
W25Q32BW
Publication Release Date: July 08, 2010
- 47 -
Preliminary - Revision E
10.2.29 High Performance Mode (A3h)
The High Performance Mode (HPM) instruction must be executed prior to Dual or Quad I/O instructions
when operating at high frequencies (see FR in AC Electrical Characteristics). This instruction allows pre-
charging of internal charge pumps so the voltages required for accessing the Flash memory array are
readily available. The instruction sequence includes the A3h instruction code followed by three dummy
byte clocks shown in figure 27. After the HPM instruction is executed, the device will maintain a slightly
higher standby current (Icc3) than standard SPI operation. The Release from Power-down or HPM
instruction (ABh) can be used to return to standard SPI standby current (Icc1). In addition, Write Enable
instruction (06h) and Power Down instruction (B9h) will also release the device from HPM mode back to
standard SPI standby state.
Figure 27. High Performance Mode Instruction Sequence
10.2.30 Release Power-down or HPM / Device ID (ABh)
The Release from Power-down or High Performance Mode / Device ID instruction is a multi-purpose
instruction. It can be used to release the device from the power-down state or High Performance Mode,
or obtain the devices electronic identification (ID) number.
To release the device from the power-down state or High Performance Mode, the instruction is issued by
driving the /CS pin low, shifting the instruction code “ABh” and driving /CS high as shown in figure 28a.
Release from power-down will take the time duration of tRES1 (See AC Characteristics) before the device
will resume normal operation and other instructions are accepted. The /CS pin must remain high during
the tRES1 time duration.
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by
driving the /CS pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device ID
bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure
28a. The Device ID values for the W25Q32BW is listed in Manufacturer and Device Identification table.
The Device ID can be read continuously. The instruction is completed by driving /CS high.
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