參數(shù)資料
型號(hào)： W65C816SQ10
英文描述： Microprocessor
中文描述： 微處理器
文件頁(yè)數(shù)： 56/62頁(yè)
文件大?。?/td> 891K
代理商： W65C816SQ10
WESTERN DESIGN CENTER
7.16
COP Signatures
W65C816S
March 1, 2000
56
Signatures 00-7F may be user defined, while signatures 80-FF are reserved for instructions on future
microprocessors. Contact WDC for software emulation of future microprocessor hardware functions.
7.17
WDM OpCode Use
The WDM OpCode may be used on future microprocessors. It performs no operation. WDM are the
initials of William D. Mensch, Jr., the founder of WDC.
7.18
RDY Pulled During Write
The NMOS 6502 does not stop during a write operation. In contrast, both the W65C02S and the
W65C816S do stop during write operations.
7.19
MVN and MVP Affects on the Data Bank Register
The MVN and MVP instructions change the Data Bank Register to the value of the second byte of the
instruction (destination bank address).
7.20
Interrupt Priorities
The following interrupt priorities will be in effect should more than one interrupt occur at the same time:
Highest Priority
RESB
Lowest Priority
ABORTB, NMIB, IRQB
7.21
Transfers from 8-Bit to 16-Bit, or 16-Bit to 8-Bit Registers
All transfers from one register to another will result in a full 16-bit output from the source register. The
destination register size will determine the number of bits actually stored in the destination register and the
values stored in the processor Status Register. The following are always 16-bit transfers, regardless of the
accumulator size: TCS,TSC,TCD,TDC
7.22
Stack Transfers
When in the Emulation mode, a 01 is forced into SH. In this case, the B Accumulator will not be loaded
into SH during a TCS instruction. When in the Native mode, the B Accumulator is transferred to SH.
Note that in both the Emulation and Native modes, the full 16 bits of the Stack Register are transferred to
the A, B and C Accumulators, regardless of the state of the M bit in the Status Register.
7.23
BRK Instruction
The BRK instruction for both the NMOS 6502, 65C02 and 65C816 is actually a 2 byte instruction. The
NMOS device simply skips the second byte (i.e. doesn’t care about the second byte) by incrementing the
program counter twice. The 65C02 and 65C816 does the same thing except the assembler is looking for
the second byte as a “signature byte”. With either device (NMOS or CMOS), the second byte is not used.
It is important to realize that if a return from interrupt is used it will return to the location after the second
or signature byte.
Section 8
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