- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68459 > W6692ACF (WINBOND ELECTRONICS CORP) DATACOM, ISDN CONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | W6692ACF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DATACOM, ISDN CONTROLLER, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數(shù)： | 59/98頁 |
| 文件大?。?/td> | 584K |
| 代理商： | W6692ACF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁當(dāng)前第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-62 -
Contains the Monitor channel data transmitted in GCI Monitor channel 0 according to the Monitor channel protocol.
8.1.30 Monitor Channel 0 Interrupt Register
MO0I
Read_clear
Address 74H/1DH
Value after reset: 00H
7
6
5
4
3
2
1
0
MDR
0
MER
0
MDA
0
MAB
0
MDR0
Monitor channel 0 Data Receive
MER0
Monitor channel
0 End of Reception
MDA0
Monitor channel
0 Data Acknowledged
The remote end has acknowledged the Monitor byte being transmitted.
MAB0
Monitor channel
0 Data Abort
8.1.31 Monitor Channel 0 Control Register
MO0C
Read/Write
Address 78H/1EH
Value after reset: 00H
7
6
5
4
3
2
1
0
MRIE0
MRC0
MXIE0
MXC0
MRIE0
Monitor Channel 0 Receive Interrupt Enable
Monitor channel interrupt status MDR0, MER0 generation is enabled (1) or masked (0).
MRC0
MR Bit Control
Determines the value of the MR bit:
0: MR bit always 1. In addition, the MDR0 interrupt is blocked, except for the first byte of a packet (if MRE=1).
1: MR internally controlled by the W6692A according to Monitor channel protocol. In addition, the MDR0 interrupt
is enabled for all received bytes according to the Monitor channel protocol (if MRE=1).
MXIE0
Monitor channel 0 Transmit Interrupt Enable
Monitor interrupt status MDA0, MAB0 generation is enabled (1) or masked (0).
MXC0
MX bit Control
Determines the value of the MX bit:
0: MX always 1.
1: MX internally controlled by the W6692A according to Monitor channel protocol.
8.1.32 GCI Mode Control/Status Register
GCR
Read/Write
Address
7CH/1FH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W6694ACD | DATACOM, ISDN CONTROLLER, PQFP48 |
| W671320P | TELECOM-SLIC, PQCC28 |
| W671361P | TELECOM-SLIC, PQCC28 |
| W671361Y | TELECOM-SLIC, QCC32 |
| W671310P | TELECOM-SLIC, PQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
| W6694CD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W66ARX-18 | 制造商:Magnecraft 功能描述: |
| W66MAF185X | 制造商:Panasonic Industrial Company 功能描述:CRT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。