參數(shù)資料
型號: W78E374
英文描述: Monitor Controller
中文描述: 監(jiān)測控制器
文件頁數(shù): 4/35頁
文件大?。?/td> 186K
代理商: W78E374
Preliminary W78E365
- 4 -
PIN DESCRIPTION
SYMBOL
TYPE
DESCRIPTIONS
EA
I
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute the
external ROM. The ROM address and data will not be presented on the bus if
the EA pin is high and the program counter is within the 64 KB area.
PSEN
O H
PROGRAM STORE ENABLE: PSEN enables the external ROM data in the
Port 0 address/data bus. When internal ROM access is performed, no PSEN
strobe signal outputs originate from this pin.
ALE
O H
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
separates the address from the data on Port 0. ALE runs at 1/6th of the
oscillator frequency. An ALE pulse is omitted during external data memory
accesses.
RST
I L
RESET: A high on this pin for two machine cycles while the oscillator is
running resets the device.
XTAL1
I
CRYSTAL 1: This is the crystal oscillator input. This pin may be driven by an
external clock.
XTAL2
O
CRYSTAL 2: This is the crystal oscillator output. It is the inversion of XTAL1.
V
SS
I
GROUND: ground potential.
V
DD
I
POWER SUPPLY: Supply voltage for operation.
P0.0
P0.7
I/O D PORT 0: Function is the same as that of standard 8052. (Default)
PORT 0 can be programming configured to standard port with internal pull-ups
P1.0
P1.7
I/O H
PORT 1: Function is the same as that of standard 8052. The ports P1.3~P1.7
also provide alternated function of PWM. See details below.
P2.0
P2.7
I/O H
PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups. This port also
provides the upper address bits for accesses to external memory.
P3.0
P3.7
P4.0
P4.7
I/O H
PORT 3: Function is the same as that of the standard 8052.
I/O H
PORT 4: A bi-directional I/O port with alternate function.
P4.4~P4.7 are direct LED drive outputs (20 mA) and are available on 48-pin
LQFP package
* Note :
TYPE
I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain
Port 4
Port 4, SFR P4 at address D8H
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