參數(shù)資料
型號： W78E374
英文描述： Monitor Controller
中文描述： 監(jiān)測控制器
文件頁數(shù)： 9/35頁
文件大?。?/td> 186K
代理商： W78E374
Preliminary W78E365
Publication Release Date: April 2001
- 9 -
Revision A1
W78E365 Special Function Registers (SFRs) and Reset Values, continued
B0
+P3
00000000
+IE
00000000
+P2
11111111
+SCON
00000000
+P1
11111111
+TCON
00000000
+P0
11111111
P43AL
00000000
P42AL
00000000
P43AH
00000000
P42AH
00000000
B7
A8
P2ECON
0000xx00
AF
A0
A7
98
SBUF
xxxxxxxx
P2EAL
00000000
P2EAH
00000000
9F
90
P41AL
00000000
TH0
00000000
P40AL
00000000
P41AH
00000000
TH1
00000000
P40AH
00000000
97
88
TMOD
00000000
SP
00000111
TL0
00000000
DPL
00000000
TL1
00000000
DPH
00000000
8F
80
PCON
00110000
87
Note: 1.The SFRs marked with a plus sign(+) are both byte- and bit-addressable.
2. The text of SFR with bold type characters are extension function registers.
P4CONB (C3H)
BIT
7, 6
NAME
P43FUN1
P43FUN0
FUNCTION
00: Mode 0. P4.3 is a general purpose I/O port which is the same as Port1.
01: Mode 1. P4.3 is a Read Strobe signal for chip select purpose. The address
range depends on the SFR P43AH, P43AL, P43CMP1 and P43CMP0.
10: Mode 2. P4.3 is a Write Strobe signal for chip select purpose. The address
range depends on the SFR P43AH, P43AL, P43CMP1 and P43CMP0.
11: Mode 3. P4.3 is a Read/Write Strobe signal for chip select purpose. The
address range depends on the SFR P43AH, P43AL, P43CMP1, and
P43CMP0.
Chip-select signals address comparison:
00: Compare the full address (16 bits length) with the base address register
P43AH, P43AL.
01: Compare the 15 high bits (A15
A1) of address bus with the base address
register P43AH, P43AL.
10: Compare the 14 high bits (A15
A2) of address bus with the base address
register P43AH, P43AL.
11: Compare the 8 high bits (A15
A8) of address bus with the base address
register P43AH, P43AL.
The P4.2 function control bits which are the similar definition as P43FUN1,
P43FUN0.
The P4.2 address comparator length control bits which are the similar definition
as P43CMP1, P43CMP0.
5, 4
P43CMP1
P43CMP0
3, 2
P42FUN1
P42FUN0
P42CMP1
P42CMP0
1, 0
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