參數(shù)資料
型號: W78E858A40PL
廠商: Nuvoton Technology Corporation of America
文件頁數(shù): 8/35頁
文件大?。?/td> 0K
描述: IC MCU 8-BIT 32K FLASH 44-PLCC
標準包裝: 30
系列: W78
核心處理器: 8052
芯體尺寸: 8-位
速度: 40MHz
連通性: EBI/EMI,串行端口
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-PLCC
包裝: 管件
W78E858
PW MEN0
PW M EN1
PW MEN2
PW MEN3
ENDAC
OR
PW MP SFR
8-BIT PRESCALER
8-BIT UP CO UNT ER
DAC2
8-BIT DETECT
DAC3
DAC0
8-BIT DETECT
8-BIT DET ECT
DAC1
AND
Fosc
INTERNAL
BUS
OUTPUT
BUFFER
OUTPUT
BUFFER
OUTPUT
BUFFER
OUTPUT
BUFFER
P1.4
P1.5
P1.6
P1.7
Fig. Four Channels 8-Bit PW M Function Block Diagram
5.12 In-system Programming System
The W78E858 provided in-system programming function for new firmware updated. After the related
register and flags are set, user can start timer and force the CPU enter idle mode, then W78E858 will
perform the in-system program mode function specify in SFRCN register, the destination data and
address will come from the related SFR.
The CHPCON is read only by default. Firmware designer must write 87H, 59H sequentially to this
special register CHPENR to enable the CHPCON write attribute, and write other value to disable
CHPCON write attribute. This register protects from writing to the CHPCON register carelessly.
5.12.1 SFRAL (C4H)
The programming low-order byte address of FLASH EPROM in-system programming mode
5.12.2 SFRAH (C5H)
The programming high-order byte address of FLASH EPROM in-system programming mode
5.12.3 SFRFD (C6H)
The programming data for on-chip FLASH EPROM in-system programming mode
Publication Release Date: April 22, 2008
- 16 -
Revision A8
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