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參數(shù)資料
| 型號： | W963B6BBN80I |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | 512K X 16 PSEUDO STATIC RAM, 75 ns, PBGA48 |
| 封裝： | 6 X 8 MM, 0.75 MM PITCH, TFBGA-48 |
| 文件頁數(shù)： | 4/29頁 |
| 文件大?。?/td> | 948K |
| 代理商： | W963B6BBN80I |
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W963B6BBN
Write Operation, Continued
Notes:
*1: Minimum value must be equal or greater than the sum of actual tCW (or tWP) and tWRC (or tWR).
*2: New write address is valid from either CE1 or WE is brought to High.
*3: The tOEH is specified from end of tWC(min.). The tOEH(min) is a reference value when the access time is determined by
tOE.
If actual value, tOEH(actual) is shorter than specified minimum value, tOE become longer by the amount of subtracting
actual value from specified minimum value.
*4: The tOEH(max) is applicable if CE1 is kept at Low and both WE and OE are kept at High.
*5: The tOEH[ABS] is the absolute minimum value if write cycle is terminated by WE and CE1 stays Low.
*6: tOHCL(min) must be satisfied if read operation is not performed prior to write operation.
In case OE is disabled after tOHCL(min.), WE Low must be asserted after tRC(min.) from CE1 Low. In other words,
read operation is initiated if tOHCL(min) is not satisfied.
*7: Applicable if CE1 stays Low after read operation.
*8: tCW and tWP is applicable if write operation is initiated by CE1 and WE , respectively.
*9: tWRC and tWR is applicable if write operation is terminated by CE1 and WE , respectively.
The tWR(min.) can be ignored if CE1 is brought to High together or after WE is brought to High. In such case, the
tCP(min) must be satisfied.
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| W963L6ABN | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K WORD X 16 BIT LOW POWER PSEUDO SRAM |
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| W963L6ABN70E | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K WORD X 16 BIT LOW POWER PSEUDO SRAM |
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| W963L6ABN80 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K WORD X 16 BIT LOW POWER PSEUDO SRAM |
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