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參數(shù)資料
| 型號： | WEDPNF8M722V-1015BC |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA275 |
| 封裝： | 35 X 25 MM, PLASTIC, BGA-275 |
| 文件頁數(shù)： | 17/41頁 |
| 文件大?。?/td> | 522K |
| 代理商： | WEDPNF8M722V-1015BC |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPNF8M722V-XBX
WRITE OPERATION STATUS
The device provides several bits to determine the status of a write
operation: FD2, FD3, FD5, FD6, and FD7; FD18, FD19, FD21, FD22 and
FD23 respectively. Table 8 and the following subsections describe
the functions of these bits. FD7, RY/BY1, and FD6; FD23, RY/BY2,
and FD22 respectively each offer a method for determining whether
a program or erase operation is complete or in progress. These
bits are discussed first.
FD7/FD23: Data Polling
The Data Polling bit, FD7/FD23, indicates to the host system
whether an Embedded Algorithm is in progress or completed, or
whether the device is in Erase Suspend Data Polling valid after the
rising edge of the final FWE pulse in the program or erase
command sequence.
During the Embedded Program algorithm, the device outputs on
FD7/FD23 the complement of the datum programmed to FD7/FD23.
This FD7/FD23 status also applies to programming during Erase
Suspend. When the Embedded Program algorithm is complete, the
device outputs the datum programmed to FD7/FD23. The system
must provide the program address to read valid status information
on FD7/FD23. If a program address falls within a protected sector,
Data Polling on FD/FD237 is active for approximately 1
s, then the
device returns to reading array data.
During the Embedded Erase algorithm, Data Polling produces a
“0” on FD7/FD23. When the Embedded Erase algorithm is complete,
or if the device enters the Erase Suspend mode, Data Polling
produces a “1” on FD7/FD23. This analogous to the complement/
true datum output described for the Embedded Program algorithm:
the erase function changes all the bits in a sector to “1”; prior to
this, the device outputs the “complement,” or “0.” The system
must provide an address within any of the sectors selected for
erasure to read valid status information on FD7/FD23.
After an erase command sequence is written, if all sectors selected
for erasing are protected, Data Polling on FD7/FD23 is active for
approximately 100
s, then the device returns to reading array
data. If not all selected sectors are protected, the Embedded Erase
algorithm erases the unprotected sectors, and ignores the selected
sectors that are protected.
When the system detects FD7/FD23 has changed from the complement
to true data, it can read valid data at FD7-0 and FD23-16 respectively
on the
following read cycles. This because FD7/FD23 may change
asynchronously with FD0-6 and FD16-22 respectively while Flash
Output Enable (FOE) is asserted low. Figure 14, Data Polling
timings (During Embedded algorithms), in the “Flash AC
characteristics” section illustrates this.
Table 8 shows the outputs for Data Polling on FD7/FD23. Figure 7
shows the Data Polling algorithm.
FIG.7
DATA POLLING ALGORITHM
1. FD7/FD23 should be rechecked even if FD5/FD21 = 1 because FD7/FD23 may
change simultaneously with FD5/FD21 respectively.
Start
Read Byte
(FD0-7/FD16-23)
Addr = VA
Read Byte
(FD0-7-FD16-23)
Addr = VA
Fail
FD7/FD23 = Data
?
FD5/FD21 = 1
?
FD7/FD23 = Data
?
No
Yes
No
Pass
No
VA = Byte address for programming
= Any of the sector addresses within the
sector being erased during sector erase
operation
= Valid address equals any non-protected
sector group address during chip erase
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WEDPNF8M722V-1015BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1015BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1210BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1210BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1210BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
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