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參數(shù)資料
| 型號： | WEDPNF8M722V-1210BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA275 |
| 封裝： | 32 X 25 MM, PLASTIC, BGA-275 |
| 文件頁數(shù)： | 22/43頁 |
| 文件大小： | 1280K |
| 代理商： | WEDPNF8M722V-1210BI |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WEDPNF8M722V-XBX
NOTES:
1. FD5 switches to "1" when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See "FD5: Exceed Timing Limits" for more
information.
2. FD7 and FD2 require valid address when reading status information. Refer to the appropriate subsection for further details.
TABLE 8 - WRITE OPERATION STATUS
Status
FD
FD77777(2)
(2)
FD
FD66666
FD
FD55555(1)
(1)
FD
FD33333
FD
FD22222(2)
(2)
RY/BY1
Embedded Program Algorithm
FD7
Toggle
0
N/A
No Toggle
0
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
0
Reading within Erase Suspended Sector
1
No Toggle
0
N/A
Toggle
1
Reading within Non-Erase Suspended Sector
Data
1
Erase Suspended Program
FD7
Toggle
0
N/A
0
Standard
Mode
Erase
Suspend
Mode
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tWC
100
120
150
ns
Write Enable Setup Time
t WLEL
tWS
00
0
ns
Chip Select Pulse Width
tELEH
tCP
45
50
ns
Address Setup Time
tAVEL
tAS
00
0
ns
Data Setup Time
tDVEH
tDS
45
50
ns
Data Hold Time
tEHDX
tDH
00
0
ns
Address Hold Time
t ELAX
tAH
45
50
ns
Chip Select Pulse Width High
tEHEL
tCPH
20
ns
Duration of Byte Programming Operation (1)
tWHWH1
300
s
Sector Erase Time
tWHWH2
15
sec
Read Recovery Time (2)
tGHEL
00
0
s
Chip Programming Time
50
sec
After writing a sector erase command sequence, the system
may read FD3 to determine whether or not an erase opera-
tion has begun. (The sector erase timer does not apply to
the chip erase command.) If additional sectors are selected
for erasure, the entire time-out also applies after each addi-
tional sector erase command. When the time-out is com-
pleted, FD3 switches from “0” to “1.” The system may ignore
FD3 if the system can guarantee that the time between addi-
tional sector erase commands will always be less than 50s.
See also the “Sector Command Sequence” section.
After the sector erase command sequence is written, the
FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED
(VCC = 3.3V, VSS = 0V, TA = -55°C TO +125°C)
1. Typical value for tWHWH1 is 9s.
2. Guaranteed by design, but not tested.
FD3: SECTOR ERASE TIMER
system should read the status on FD7/FD23 (Data Polling) or
FD6/FD22 (Toggle Bit I) to ensure the device has accepted
the command sequence, and then read FD3/FD19. If FD3/
FD19 is high (“1”) the internally controlled erase cycle has
begun; all fur ther commands (other than Erase Suspend)
will be ignored until the erase operation is completed. If
FD3/FD19 is low (“0”). the device will accept additional sec-
tor erase commands. To ensure the command has been
accepted, the system software should check the status of
FD3/FD19 prior to and following each subsequent sector
erase command. If FD3/FD19 is high on the second status
check, the last command may not have been accepted.
Table 8 shows the inputs for FD3/FD19.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| WEDPNF8M722V-1210BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1212BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1212BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1212BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1215BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
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