
WM8170
Product Preview Rev 1.0
WOLFSON MICROELECTRONICS LTD
PP Rev 1.0 March 2000
4
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NAME
TYPE
DESCRIPTION
D5
DGND2
DVDD4
D6
D7
D8
D9
PTDO
AGND1
AVDD1
AVDD3
VCLP
ISET
VRT
VRB
VMID
AGND2
DIN
PIN
AVDD2
Digital IO
Supply
Supply
Digital IO
Digital IO
Digital IO
Digital IO
Digital output
Supply
Supply
Supply
Analogue output
Analogue output
Analogue output
Analogue output
Analogue output
Supply
Analogue input
Analogue input
Supply
Data output 5/parallel data IO3
Digital ground for D0 to D9, PTDO pins
Digital supply for D0 to D9, PTDO pins
Data output 6/parallel data IO4
Data output 7/parallel data IO5
Data output 8/parallel data IO6
Data output 9 (MSB)/parallel data IO7
Programmable threshold detect output
Analogue ground and device substrate
Analogue supply for ADC
Analogue supply for references, bias voltage
Reset level clamping voltage output
External resistor for bias current control
Upper ADC reference voltage output
Lower ADC reference voltage output
Midrail reference voltage output
Analogue ground and device substrate
Video data input
Video preset input
Analogue supply for S/H, PGA, analogue DC correction loop and
auxiliary DACs
Sample and Hold data control
Sample and Hold preset control
Digital supply BLCENB, CLPENB, CLPSWB, PBLK, SHD, SHP pins
Reset level clamp enable input, active low
Reset level clamp enable switch, active low
Input blocking control, active low/Horizontal drive timing signal input
Black level clamp control, active low
Digital ground for DVDD1, DVDD2, DVDD3 supplies
Parallel not serial control
External power down, active low/Vertical drive timing signal input
Output enable bar, active low
Master chip reset, active low
Digital supply for PDB, NRESET, SCK/RNW, SEN/STB, PNS,
SDI/DNA, OEB, DCLK, SDO pins
Serial data output, tri-stateable
Serial data in/parallel data not address (management interface)
Serial enable/parallel strobe (management interface)
Serial clock/parallel read not write (management interface)
Output data retiming clock input
Digital supply for internal logic
Auxiliary DAC1 output
Auxiliary DAC2 output
Positive supply for internal clock generation circuitry
Ground for internal clock generation circuitry
Data output 0 (LSB), tri-stateable
Data output 1, tri-stateable
Data output 2/parallel data IO0
Data output 3/parallel data IO1
Data output 4/parallel data IO2
21
22
23
24
25
26
27
28
29
30
31
32
33
SHD
SHP
DVDD2
CLPENB
CLPSWB
PBLK/HD
BLCENB
DGND1
PNS
PDB/VD
OEB
NRESET
DVDD3
Digital input
Digital input
Supply
Digital input
Digital input
Digital input
Digital input
Supply
Digital input
Digital input
Digital input
Digital input
Supply
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SDO
SDI/DNA
SEN/STB
SCK/RNW
DCLK
DVDD1
VOUT1
VOUT2
CVDD
CGND
D0
D1
D2
D3
D4
Digital tri-stateable output
Digital input
Digital input
Digital input
Digital input
Supply
Analogue output
Analogue output
Supply
Supply
Digital output
Digital output
Digital IO
Digital IO
Digital IO