- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371190 > X1228S14I-4.5A (INTERSIL CORP) 15V 300W SOT23 TRANSORB-DUAL-SINGL''ENDED PDF資料下載
參數(shù)資料
| 型號： | X1228S14I-4.5A |
| 廠商： | INTERSIL CORP |
| 元件分類： | XO, clock |
| 英文描述： | 15V 300W SOT23 TRANSORB-DUAL-SINGL''ENDED |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO14 |
| 封裝： | PLASTIC, SOIC-14 |
| 文件頁數(shù)： | 15/31頁 |
| 文件大?。?/td> | 569K |
| 代理商： | X1228S14I-4.5A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
X1228
REV 1.3 3/24/04
Characteristics subject to change without notice.
15 of 31
www.xicor.com
Analog Trimming Register (ATR) (Non-volatile)
Six analog trimming Bits from
ATR5
to
ATR0
are pro-
vided to adjust the on-chip loading capacitance range.
The on-chip load capacitance ranges from 3.25pF to
18.75pF. Each bit has a different weight for capaci-
tance adjustment. In addition, using a Citizen CFS-206
crystal with different ATR bit combinations provides an
estimated ppm range from +116ppm to -37ppm to the
nominal frequency compensation. The combination of
digital and analog trimming can give up to +146ppm
adjustment.
The on-chip capacitance can be calculated as follows:
C
ATR
= [(ATR value, decimal) x 0.25pF] + 11.0pF
Note that the ATR values are in two’s complement, with
ATR(000000) = 11.0pF, so the entire range runs from
3.25pF to 18.75pF in 0.25pF steps.
The values calculated above are typical, and total load
capacitance seen by the crystal will include approxi-
mately 2pF of package and board capacitance in addi-
tion to the ATR value.
See Application section and Xicor’s Application Note
AN154 for more information.
WRITING TO THE CLOCK/CONTROL REGISTERS
Changing any of the nonvolatile bits of the clock/control
register requires the following steps:
– Write a 02h to the Status Register to set the Write
Enable Latch (WEL). This is a volatile operation, so
there is no delay after the write. (Operation pre-
ceeded by a start and ended with a stop).
– Write a 06h to the Status Register to set both the
Register Write Enable Latch (RWEL) and the WEL
bit. This is also a volatile cycle. The zeros in the data
byte are required. (Operation preceeded by a start
and ended with a stop).
– Write one to 8 bytes to the Clock/Control Registers
with the desired clock, alarm, or control data. This
sequence starts with a start bit, requires a slave byte
of “11011110” and an address within the CCR and is
terminated by a stop bit. A write to the CCR changes
EEPROM values so these initiate a nonvolatile write
cycle and will take up to 10ms to complete. Writes to
undefined areas have no effect. The RWEL bit is
reset by the completion of a nonvolatile write cycle,
so the sequence must be repeated to again initiate
another change to the CCR contents. If the
sequence is not completed for any reason (by send-
ing an incorrect number of bits or sending a start
instead of a stop, for example) the RWEL bit is not
reset and the device remains in an active mode.
– Writing all zeros to the status register resets both the
WEL and RWEL bits.
– A read operation occurring between any of the previ-
ous operations will not interrupt the register write
operation.
POWER ON RESET
Application of power to the X1228 activates a Power
On Reset Circuit that pulls the RESET pin active. This
signal provides several benefits.
– It prevents the system microprocessor from starting
to operate with insufficient voltage.
– It prevents the processor from operating prior to sta-
bilization of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power up.
When V
CC
exceeds the device V
TRIP
threshold value
for typically 250ms the circuit releases RESET, allow-
ing the system to begin operation. Recommended slew
rate is between 0.2V/ms and 50V/ms.
WATCHDOG TIMER OPERATION
The watchdog timer is selectable. By writing a value to
WD1 and WD0, the watchdog timer can be set to 3 dif-
ferent time out periods or off. When the Watchdog
timer is set to off, the watchdog circuit is configured for
low power operation.
Watchdog Timer Restart
The Watchdog Timer is started by a falling edge of
SDA when the SCL line is high and followed by a stop
bit. The start signal restarts the watchdog timer
counter, resetting the period of the counter back to the
maximum. If another start fails to be detected prior to
the watchdog timer expiration, then the RESET pin
becomes active. In the event that the start signal
occurs during a reset time out period, the start will
have no effect. When using a single START to refresh
watchdog timer, a STOP bit should be followed to reset
the device back to stand-by mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X1228S14IZ | TVS Diode; TVS Polarization:Unidirectional; Stand-Off Voltage, VRWM:15V; Breakdown Voltage, Vbr:16.7V; Peak Pulse Power PPK @ 8x20uS:300W; Capacitance, Cd:100pF; Package/Case:SOT-323; Breakdown Voltage Min:16.7V |
| X1228S14IZ-2.7A | RTC Module With CPU Supervisor |
| X1228S14Z | DIODE ZENER DUAL 15V |
| X1228V14 | RTC Module With CPU Supervisor |
| X1228V14-2.7 | DIODE TVS 12/-7V LOW CAP SOT23 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X1228S14IZ | 功能描述:IC RTC/CAL/SUP/ALRM 4K EE 14SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 標準包裝:2,500 系列:- 類型:時鐘/日歷 特點:警報器，閏年，監(jiān)控器，監(jiān)視計時器 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 電壓 - 電源，電池:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X1228S14IZ-2.7 | 功能描述:IC RTC/CAL/SUP/ALARM 4K-EE14SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件 |
| X1228S14IZ-2.7A | 功能描述:IC RTC/CAL/CPU SUP EE 14-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件 |
| X1228S14IZ-4.5A | 功能描述:IC RTC/CAL/CPU SUP EE 14-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件 |
| X1228S14Z | 功能描述:IC RTC/CAL/CPU SUP EE 14-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件 |
發(fā)布緊急采購，3分鐘左右您將得到回復。