參數(shù)資料
型號: X25097M-2.7
英文描述: 2-Phase Dual Synchronous PWM Controller with Oscillator Synchronization and Pre-Bias Startup; A IR3621 packaged in a 28-Pin TSSOP on Tape and Reel
中文描述: SPI串行EEPROM
文件頁數(shù): 9/14頁
文件大小: 136K
代理商: X25097M-2.7
FORNEWDESGN
X25097
Characteristics subject to change without notice.
9 of 14
REV 1.1 9/8/00
www.xicor.com
CAPACITANCE
T
A
= +25°C, f = 1MHz, V
CC
= 5.0V
Note:
(3) This parameter is periodically sampled and not 100% tested.
A.C. CHARACTERISTICS
(Over the recommended operating conditions, unless otherwise specified.)
Data Input Timing
Notes:
(3) This parameter is periodically sampled and not 100% tested.
(4) t
WC
is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile
write cycle.
Data Output Timing
Note:
(5) t
WC
is the time from the rising edge of tCS after a valid write sequence has been sent to the end of the self-timed internal nonvola-
tile write cycle.
Symbol
C
OUT
(3)
C
IN
(3)
Parameter
Max.
8
6
Unit
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
Output Capacitance (SO)
Input Capacitance (SCK, SI, CS, WP)
Symbol
f
SCK
t
CYC
t
LEAD
t
LAG
t
WH
t
WL
t
SU
t
H
t
RI
(3)
t
FI
(3)
t
CS
t
WC
(4)
Parameter
Voltage
2.7V–5.5V
2.7V–5.5V
2.7V–5.5V
2.7V–5.5V
2.7V–5.5V
2.7V–5.5V
Min.
0
200
100
100
80
80
20
20
Max.
5
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ms
Clock frequency
Cycle time
CS lead time
CS lag time
Clock HIGH time
Clock LOW time
Data setup time
Data hold time
Data in rise time
Data in fall time
CS deselect time
Write cycle time
2
2
100
10
Symbol
f
SCK
t
DIS
t
V
t
HO
t
RO
(5)
t
FO
(5)
Parameter
Voltage
2.7V–5.5V
2.7V–5.5V
2.7V–5.5V
Min.
0
Max.
5
100
80
Unit
MHz
ns
ns
ns
ns
ns
Clock frequency
Output disable time
Output valid from clock LOW
Output hold time
Output rise time
Output fall time
0
50
50
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