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參數(shù)資料
| 型號： | X4163S8Z |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | ROHS COMPLIANT, SOIC-8 |
| 文件頁數(shù)： | 6/22頁 |
| 文件大?。?/td> | 342K |
| 代理商： | X4163S8Z |
14
FN8120.2
November 26, 2007
Figure 14. Sequential Read Sequence
Sequential Read
Sequential reads can be initiated as either a current
address read or random address read. The first Data
Byte is transmitted as with the other modes; however,
the master now responds with an acknowledge, indicat-
ing it requires additional data. The device continues to
output data for each acknowledge received. The master
terminates the read operation by not responding with an
acknowledge and then issuing a stop condition.
The data output is sequential, with the data from
address n followed by the data from address n + 1.
The address counter for read operations increments
through all page and column addresses, allowing the
entire memory contents to be serially read during one
operation. At the end of the address space the counter
“rolls over” to address 0000H and the device continues
to output data for each acknowledge received. Refer
to Figure 14 for the acknowledge and data transfer
sequence.
X4163, X4165 Addressing
SLAVE ADDRESS BYTE
Following a start condition, the master must output a
Slave Address Byte. This byte consists of several
parts:
– a device type identifier that is ‘1010’ to access the
array.
– one bits of ‘0’.
– next two bits are the device address.
– one bit of the slave command byte is a R/W bit. The
R/W bit of the Slave Address Byte defines the oper-
ation to be performed. When the R/W bit is a one,
then a read operation is selected. A zero selects a
write operation. Refer to Figure 15.
– After loading the entire Slave Address Byte from the
SDA bus, the device compares the input slave byte
data to the proper slave byte. Upon a correct compare,
the device outputs an acknowledge on the SDA line.
Word Address
The word address is either supplied by the master or
obtained from an internal counter. The internal counter
is undefined on a power up condition.
Data
(2)
S
t
o
p
Slave
Address
Data
(n)
A
C
K
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
1
Data
(n-1)
A
C
K
A
C
K
(n is any integer greater than 1)
Data
(1)
X4163, X4165
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| X4165V8-2.7 | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| X4165S8-4.5A | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| X5001S8-1.8 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| X5043V14I-2.7A | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X4163S8Z-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CPU Supervisor with 16K EEPROM |
| X4163S8Z-2.7A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CPU Supervisor with 16K EEPROM |
| X4163S8Z-4.5A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CPU Supervisor with 16K EEPROM |
| X4163V8 | 功能描述:IC SUPERVISOR CPU 16K EE 8-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:- 復位:低有效 復位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X4163V8-2.7 | 功能描述:IC SUPERVISOR CPU 16K EE 8-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:- 復位:低有效 復位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應商設(shè)備封裝:8-TSSOP 包裝:管件 |
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