參數(shù)資料
型號(hào): X4283
廠商: Intersil Corporation
元件分類: DRAM
英文描述: CPU Supervisor with 128K EEPROM
中文描述: CPU監(jiān)控與128K的EEPROM的
文件頁(yè)數(shù): 16/22頁(yè)
文件大?。?/td> 412K
代理商: X4283
X4283/85 – Preliminary Information
Characteristics subject to change without notice.
16 of 22
REV 1.17 11/27/00
www.xicor.com
TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Note:
(1) t
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
Symbol
t
WC
(1)
Parameter
Write Cycle Time
Min.
Typ.
(1)
5
Max.
10
Unit
ms
t
SU:STO
t
DH
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA OUT
t
F
t
LOW
t
BUF
t
AA
t
R
t
HD:WP
SCL
SDA IN
WP
t
SU:WP
Clk 1
Clk 9
Slave Address Byte
START
SCL
SDA
t
WC
8
th
Bit of Last Byte
ACK
Stop
Condition
Start
Condition
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