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參數(shù)資料
| 型號： | X68C75 SLIC |
| 英文描述： | Port Expander and EE Memory(端口擴展，多重地址/數(shù)據(jù)總線，高速CMOS,微控制器外圍芯片) |
| 中文描述： | 端口擴展和EE記憶體（端口擴展，多重地址/數(shù)據(jù)總線，高速的CMOS微控制器外圍芯片） |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 238K |
| 代理商： | X68C75 SLIC |
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15
X68C75 SLIC
E
2
Example 3
If an application requires larger program memory stor-
age and both extra ports, then example 2 does not meet
this requirement. Since the LAM feature uses port B to
output the non-multiplexed address, then port B cannot
be also used as general purpose I/O. The solution to this
problem is to use X88C64, which interfaces to a multi-
plexed bus and takes an active LOW
CE
input. Example
3 maps the X88C64 to the bottom 8K program memory
space in the range of 0000-1FFFH. This approach
provides a total of 16K-bytes of program memory. Using
the same approach, two additional X88C64 devices can
be added and A13-A14 can be used as their
CE
inputs,
for a total of 32K-bytes of program memory. Ports A and
B are still available to handle any general purpose I/O
functions.
Example 4
For those applications using extensive I/O, up to 128
I/O pins are obtained by placing 8 of the X68C75 devices
on the same bus. This approach gives a total of 64K-bytes
of program memory space, and 128 I/O pins. Note that
the SFRM can overlap the E
2
M address space, however,
only the SFR resources are accessible and the associ-
ated E
2
memory location are not available.
Figure 17. Example 4
Figure 16. Example 3
X8C5
68HC11
A[15:8]
2899 ILL F19
AD[7:0]
PA
STRB
PB
STRA
128 I/O
VCC
AS
R/W
E
AS
R/W
E
CE
AS
R/W
E
AS
R/W
E
CE
RD
ALE
R/W
A/D7-A/D0
A12-A8
A15
VCC
VCC
2899 ILL F18
STRA
PA
X68C75
68HC11
X88C64
A[15:8]
AD[7:0]
AD7:0
A15:8
STRB
RESET
PB
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