參數(shù)資料
型號: X68C75 SLIC
英文描述: Port Expander and EE Memory(端口擴(kuò)展,多重地址/數(shù)據(jù)總線,高速CMOS,微控制器外圍芯片)
中文描述: 端口擴(kuò)展和EE記憶體(端口擴(kuò)展,多重地址/數(shù)據(jù)總線,高速的CMOS微控制器外圍芯片)
文件頁數(shù): 18/28頁
文件大?。?/td> 238K
代理商: X68C75 SLIC
18
X68C75 SLIC
E
2
E Controlled Write Cycle
No.
Symbol
Parameter
Min.
Max.
Units
1
2
3
4
5
6
7
8
9
10
11
12
PW
ASH
t
ASL
t
AHL
t
DSW
t
DHW
t
CSL
PW
EH
t
ES
t
RWS
t
EH
t
WC
t
BLC
Address Strobe Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
CE Setup Time
E Pulse Width
Enable Setup Time
R/
W
Setup Time
E Hold Time
Write Cycle Time
Byte Load Time (Page Write)
80
20
30
50
30
7
120
30
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
μ
s
5
0.5
100
2899 PGM T11
E Controlled Write Cycle
Note:
(4) t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
AS
A/D0–A/D7
A8–A12
R/W
AIN
DIN
2899 ILL F22
CE
A8–A12
E
1
6
2
9
7
4
5
10
3
10
8
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