參數(shù)資料
型號: X9241YVM
元件分類: 數(shù)字電位計
英文描述: Quad E2POT⑩ Nonvolatile Digital Potentiometer
中文描述: 四E2POT⑩非易失數(shù)字電位器
文件頁數(shù): 7/16頁
文件大?。?/td> 76K
代理商: X9241YVM
X9241
7
DETAILED OPERATION
All four E
2
POT potentiometers share the serial interface
and share a common architecture. Each potentiometer
is comprised of a resistor array, a wiper counter register
and four data registers. A detailed discussion of the
register organization and array operation follows.
Wiper Counter Register
The X9241 contains four wiper counter registers (WCR),
one for each E
2
POT potentiometer. The WCR can be
envisioned as a 6-bit parallel and serial load counter with
its outputs decoded to select one of sixty-four switches
along its resistor array. The contents of the WCR can be
altered in four ways: it may be written directly by the host
via the Write WCR instruction (serial load); it may be
written indirectly by transferring the contents of one of
four associated data registers via the XFR Data Register
instruction (parallel load); it can be modified one step at
a time by the Increment/ Decrement instruction; finally,
it is loaded with the contents of its data register zero (R0)
upon power-up.
The WCR is a volatile register; that is, its contents are
lost when the X9241 is powered-down. Although the
register is automatically loaded with the value in R0
upon power-up, it should be noted this may be different
from the value present at power-down.
Data Registers
Each potentiometer has four nonvolatile data registers.
These can be read or written directly by the host and
data can be transferred between any of the four data
registers and the WCR. It should be noted all operations
changing data in one of these registers is a nonvolatile
operation and will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, these registers can be
used as regular memory locations that could possibly
store system parameters or user preference data.
Figure 8. Detailed Potentiometer Block Diagram
3864 ILL F15
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0
REGISTER 1
REGISTER 2
REGISTER 3
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
WIPER
COUNTER
REGISTER
INC/DEC
LOGIC
CASCADE
CONTROL
LOGIC
UP/DN
CLK
MODIFIED SCL
UP/DN
DW
CM
VH
VL
VW
IF WCR = 00[H] THEN VW = VL
IF WCR = 3F[H] THEN VW = VH
2
8
6
C
O
U
N
T
E
R
D
E
C
O
D
E
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