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參數(shù)資料
| 型號： | X9250UV24IZ-2.7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP QUAD 256TP 50K 24-TSSOP |
| 產(chǎn)品培訓模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 62 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標準值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 管件 |
12
FN8165.3
August 29, 2006
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER UP AND DOWN REQUIREMENT
The are no restrictions on the sequencing of the bias supplies VCC, V+, and V- provided that all three supplies reach
their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less than V+
and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies reach their
final value. The VCC ramp rate spec is always in effect.
Notes: (5) This parameter is periodically sampled and not 100% tested
(6) tPUR and tPUW are the delays required from the time the third (last) power supply (VCC, V+ or V-) is stable until the specific instruction can be
issued. These parameters are periodically sampled and not 100% tested.
(7) Sample tested only.
A.C. TEST CONDITIONS
Symbol
Parameter
Limits
Test Conditions
Min.
Typ.
Max.
Unit
ICC1
VCC supply current
(active)
400
A
fSCK = 2MHz, SO = Open,
Other Inputs = VSS
ICC2
VCC supply current
(nonvolatile write)
1mA
fSCK = 2MHz, SO = Open,
Other Inputs = VSS
ISB
VCC current (standby)
5
A
SCK = SI = VSS, Addr. = VSS
ILI
Input leakage current
10
A
VIN = VSS to VCC
ILO
Output leakage current
10
A
VOUT = VSS to VCC
VIH
Input HIGH voltage
VCC x 0.7
VCC + 0.1
V
VIL
Input LOW voltage
-0.5
VCC x 0.3
V
VOL
Output LOW voltage
0.4
V
IOL = 3mA
Parameter
Min.
Unit
Minimum endurance
100,000
Data changes per bit per register
Data retention
100
Years
Symbol
Test
Max.
Unit
Test Conditions
COUT(5)
Output capacitance (SO)
8
pF
VOUT = 0V
CIN(5)
Input capacitance (A0, A1, SI, and SCK, CS)
6
pF
VIN = 0V
Symbol
Parameter
Min.
Max.
Unit
tPUR(6)
Power-up to initiation of read operation
1
ms
tPUW(6)
Power-up to initiation of write operation
5
ms
tR VCC(7)
VCC power up ramp rate
0.2
50
V/msec
Input pulse levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
X9250
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9250UV24Z-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Digitally Controlled Potentiometers |
| X9250UZ24 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|24PIN|PLASTIC |
| X9250UZ24-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|24PIN|PLASTIC |
| X9250UZ24I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|24PIN|PLASTIC |
| X9250UZ24I-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|24PIN|PLASTIC |
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