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參數(shù)資料
| 型號： | X9252UV24IZ-2.7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL QUAD 50K OHM 24TSSOP |
| 標準包裝： | 62 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標準值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（芯片選擇，設(shè)備位址，增/減） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
3
FN8167.2
November 14, 2005
Pin Descriptions
Bus Interface Pins
Serial Data Input/Output (SDA)
The SDA is a bidirectional serial data input/output pin for the
2-wire interface. It receives device address, operation code,
wiper register address and data from a 2-wire external master
device at the rising edge of the serial clock SCL, and it shifts
out data after each falling edge of the serial clock SCL.
SDA requires an external pull-up resistor, since it’s an open
drain output.
Serial Clock (SCL)
This input is the serial clock of the 2-wire and Up/Down
interface.
Device Address (A2-A0)
The Address inputs are used to set the least significant 3 bits of
the 8-bit 2-wire interface slave address. A match in the slave
address serial data stream must be made with the Address
input pins in order to initiate communication with the X9252. A
maximum of 8 devices may occupy the 2-wire serial bus.
Chip Select (CS)
When the CS pin is low, increment or decrement operations
are possible using the SCL and U/D pins. The 2-wire
interface is disabled at this time. When CS is high, the 2-wire
interface is enabled.
Up or Down Control (U/D)
The U/D input pin is held HIGH during increment operations
and held LOW during decrement operations.
DCP Select (DS1-DS0)
The DS1-DS0 select one of the four DCPs for an Up/Down
interface operation.
Hardware Write Protect Input (WP)
When the WP pin is set low, “write” operations to non volatile
DCP Data Registers are disabled. This includes both 2-wire
interface non-volatile “Write”, and Up/Down interface “Store”
operations.
DCP Pins
RH0, RL0, RH1, RL1, RH2, RL2, RH3, and RL3
These pins are equivalent to the terminal connections on
mechanical potentiometers. Since there are 4 DCPs, there is
one set of RH and RL for each DCP.
RW0, RW1, RW2, and RW3
The wiper pins are equivalent to the wiper terminal of
mechanical potentiometers. Since there are four DCPs,
there are 4 RW pins.
5
RL3
Low terminal of DCP3.
6U/D
Increment/decrement for up/down interface.
7
VCC
System supply voltage
8
RL0
Low terminal of DCP0.
9
RH0
High terminal of DCP0.
10
RW0
Wiper terminal of DCP0.
11
A2
Device address for 2-wire bus.
12
WP
Hardware write protect
13
SDA
Serial data input/output for 2-wire bus.
14
A1
Device address for 2-wire bus.
15
RL1
Low terminal of DCP1.
16
RH1
High terminal of DCP1.
17
RW1
Wiper terminal DCP1.
18
VSS
System ground
19
CS
Chip select for Up/Down interface.
20
RW2
Wiper terminal of DCP2.
21
RH2
High terminal of DCP2.
22
RL2
Low terminal of DCP2.
23
SCL
Serial clock for 2-wire bus.
24
DS1
DCP select for up/down interface.
Pin Descriptions (Continued)
SOIC/TSSOP PIN
SYMBOL
BRIEF DESCRIPTION
X9252
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