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參數(shù)資料
| 型號： | X9252UV24IZ-2.7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 0K |
| 描述： | IC POT DGTL QUAD 50K OHM 24TSSOP |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（芯片選擇，設(shè)備位址，增/減） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
15
FN8167.2
November 14, 2005
Move/Read Operation
The Move/Read operation simultaneously reads the
contents of a Data Register (DR) and moves the contents
into the corresponding DCP’s WCR and the WCRs of all
DCPs are updated with the content of their corresponding
DR. Move/Read operation consists of a one byte, or three
byte instruction followed by one or more Data Bytes (See
Figure 9). To read an arbitrary byte, the master initiates the
operation issuing the following sequence: a START, the
Slave Address byte with the R/W bit set to “0”, an Address
Byte, a second START, and a second Slave Address byte
with the R/W bit set to “1”. After each of the three bytes, the
X9252 responds with an ACK. Then the X9252 transmits
Data Bytes as long as the master responds with an ACK
during the SCL cycle following the eight bit of each byte. The
master terminates the Move/Read operation (issuing a
STOP condition) following the last bit of the last Data Byte.
The first byte being read is determined by the current DCP
address and by the Status Register bits, according to Table
2. If more than one byte is read, the DCP address is
incremented by one after each byte, in the same way as
during a Page Write operation. After reaching DCP3, the
DCP address “rolls over” to DCP0.
On power up, the Address pointer is set to the Data Register
0 of DCP0.
Signals
from the
Master
Signals from the
Slave
Signal at SDA
S
t
a
r
t
Slave
Address with
R/W=0
Address
Byte
A
C
K
A
C
K
0
11
S
t
o
p
A
C
K
0
1
0
11
Slave
Address with
R/W=1
A
C
K
S
t
a
r
t
Last Read Data
Byte
First Read Data
Byte
A
C
K
One or more Data Bytes
Current Address Read
Setting the Current Address
Random Address Read
FIGURE 9. MOVE/READ SEQUENCE
X9252
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| X9252WS24I-2.7 | 功能描述:IC XDCP QUAD 256TAP 10K 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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| X9252WV24-2.7 | 功能描述:IC DCP QUAD 10K 256TAP 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9252WV24I-2.7 | 功能描述:IC DCP QUAD 10K 256TAP 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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