參數(shù)資料
型號(hào): XC4VFX12-10FFG668I
廠商: Xilinx Inc
文件頁(yè)數(shù): 11/58頁(yè)
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-4 FX 12K 668FCBGA
標(biāo)準(zhǔn)包裝: 40
系列: Virtex®-4 FX
LAB/CLB數(shù): 1368
邏輯元件/單元數(shù): 12312
RAM 位總計(jì): 663552
輸入/輸出數(shù): 320
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 668-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 668-FCBGA
配用: HW-V4-ML403-UNI-G-ND - EVALUATION PLATFORM VIRTEX-4
HW-AFX-FF668-400-ND - BOARD DEV VIRTEX 4 FF668
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
DS302 (v3.7) September 9, 2009
Product Specification
19
IOB Pad Input/Output/3-State Switching Characteristics
Table 27 summarizes the values of standard-specific data
input delay adjustments, output delays terminating at pads
(based on standard and 3-state delays.
TIOPI is described as the delay from IOB pad through the
input buffer to the I-pin of an IOB pad. The delay varies
depending on the capability of the SelectIO input buffer.
TIOOP is described as the delay from the O pin to the IOB
pad through the output buffer of an IOB pad. The delay var-
ies depending on the capability of the SelectIO output
buffer.
TIOTP is described as the delay from the T pin to the IOB
pad through the output buffer of an IOB pad, when 3-state is
disabled. The delay varies depending on the SelectIO capa-
bility of the output buffer.
Table 28 summarizes the value of TIOTPHZ. TIOTPHZ is
described as the delay from the T pin to the IOB pad
through the output buffer of an IOB pad, when 3-state is
enabled (i.e., a high impedance state).
Table 27: IOB Switching Characteristics(1,2)
IOSTANDARD
Attribute(1)
TIOPI
TIOOP
TIOTP
Units
Speed Grade
-12
-11
-10
-12
-11
-10
-12
-11
-10
LVDS_25
1.00
1.15
1.28
1.61
1.71
1.85
1.61
1.71
1.85
ns
RSDS_25
1.00
1.15
1.28
1.61
1.71
1.85
1.61
1.71
1.85
ns
LVDSEXT_25
1.01
1.16
1.30
1.65
1.75
1.91
1.65
1.75
1.91
ns
LDT_25
1.00
1.15
1.28
1.58
1.68
1.82
1.58
1.68
1.82
ns
BLVDS_25
1.00
1.15
1.28
1.99
2.15
2.34
1.99
2.15
2.34
ns
ULVDS_25
1.00
1.15
1.28
1.59
1.68
1.83
1.59
1.68
1.83
ns
PCI33_3
(PCI, 33 MHz, 3.3V)
0.76
0.87
0.97
2.52
2.76
3.02
2.52
2.76
3.02
ns
PCI66_3
(PCI, 66 MHz, 3.3V)
0.76
0.87
0.97
2.22
2.46
2.72
2.22
2.46
2.72
ns
PCI-X
0.76
0.87
0.97
2.19
2.21
2.25
2.19
2.21
2.25
ns
GTL
1.28
1.47
1.63
1.75
1.87
2.03
1.75
1.87
2.03
ns
GTLP
1.31
1.51
1.68
1.75
1.87
2.03
1.75
1.87
2.03
ns
HSTL_I
1.28
1.47
1.64
2.00
2.16
2.35
2.00
2.16
2.35
ns
HSTL_II
1.28
1.47
1.64
1.83
1.96
2.13
1.83
1.96
2.13
ns
HSTL_III
1.28
1.47
1.64
1.90
2.04
2.22
1.90
2.04
2.22
ns
HSTL_IV
1.28
1.47
1.64
1.75
1.87
2.03
1.75
1.87
2.03
ns
HSTL_I _18
1.26
1.44
1.60
1.89
2.03
2.21
1.89
2.03
2.21
ns
HSTL_II _18
1.26
1.44
1.60
1.85
1.98
2.16
1.85
1.98
2.16
ns
HSTL_III _18
1.26
1.44
1.60
1.80
1.93
2.09
1.80
1.93
2.09
ns
HSTL_IV_18
1.26
1.44
1.60
1.77
1.89
2.06
1.77
1.89
2.06
ns
SSTL2_I
1.31
1.51
1.68
2.06
2.23
2.43
2.06
2.23
2.43
ns
SSTL2_II
1.31
1.51
1.68
1.85
1.98
2.16
1.85
1.98
2.16
ns
LVTTL, Slow, 2 mA
0.76
0.87
0.97
5.66
6.37
7.03
5.66
6.37
7.03
ns
LVTTL, Slow, 4 mA
0.76
0.87
0.97
4.10
4.57
5.04
4.10
4.57
5.04
ns
LVTTL, Slow, 6 mA
0.76
0.87
0.97
4.00
4.46
4.91
4.00
4.46
4.91
ns
LVTTL, Slow, 8 mA
0.76
0.87
0.97
4.00
4.46
4.91
4.00
4.46
4.91
ns
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