參數(shù)資料
型號： XC5202-5PQ100C
廠商： Xilinx Inc
文件頁數(shù)： 40/73頁
文件大小： 0K
描述： IC - FPGA SPEED GRADE 5 COM TEMP
產(chǎn)品變化通告： XC1700 PROMs,XC5200,HQ,SCD Parts Discontinuation 19/Jul/2010
標準包裝： 66
系列： XC5200
LAB/CLB數(shù)： 64
邏輯元件/單元數(shù)： 256
輸入/輸出數(shù)： 81
門數(shù)： 3000
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 100-BQFP
供應商設備封裝： 100-QFP（14x20）
其它名稱： Q858790
XC5202-5PQ1000C
XC5202-5PQ1000C-ND
R
November 5, 1998 (Version 5.2)
7-127
XC5200 Series Field Programmable Gate Arrays
7
XC5200 Switching Characteristics
Definition of Terms
In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as
follows:
Advance:
Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or device
families. Use as estimates, not for production.
Preliminary: Based on preliminary characterization. Further changes are not expected.
Unmarked:
Specifications not identified as either Advance or Preliminary are to be considered Final.1
XC5200 Operating Conditions
XC5200 DC Characteristics Over Operating Conditions
XC5200 Absolute Maximum Ratings
1. Notwithstanding the definition of the above terms, all specifications are subject to change without notice.
Symbol
Description
Min
Max
Units
V
CC
Supply voltage relative to GND Commercial: 0
°C to 85°C junction
4.75
5.25
V
Supply voltage relative to GND Industrial: -40
°C to 100°C junction
4.5
5.5
V
IHT
High-level input voltage — TTL configuration
2.0
V
CC
V
ILT
Low-level input voltage — TTL configuration
0
0.8
V
IHC
High-level input voltage — CMOS configuration
70%
100%
V
CC
V
ILC
Low-level input voltage — CMOS configuration
0
20%
V
CC
T
IN
Input signal transition time
250
ns
Symbol
Description
Min
Max
Units
V
OH
High-level output voltage @ I
OH = -8.0 mA, VCC min
3.86
V
OL
Low-level output voltage @ I
OL = 8.0 mA, VCC max
0.4
V
I
CCO
Quiescent FPGA supply current (Note 1)
15
mA
I
IL
Leakage current
-10
+10
A
C
IN
Input capacitance (sample tested)
15
pF
I
RIN
Pad pull-up (when selected) @ V
IN = 0V (sample tested)
0.02
0.30
mA
Note:
1. With no output current loads, all package pins at Vcc or GND, either TTL or CMOS inputs, and the FPGA configured with a
tie option.
Symbol
Description
Units
V
CC
Supply voltage relative to GND
-0.5 to +7.0
V
IN
Input voltage with respect to GND
-0.5 to V
CC +0.5
V
TS
Voltage applied to 3-state output
-0.5 to V
CC +0.5
V
T
STG
Storage temperature (ambient)
-65 to +150
°C
T
SOL
Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
+260
°C
T
J
Junction temperature in plastic packages
+125
°C
Junction temperature in ceramic packages
+150
°C
Note: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Recommended
Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may
affect device reliability.
Product Obsolete or Under Obsolescence
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