參數(shù)資料
型號(hào): XC5VLX110-3FFG1760C
廠商: Xilinx Inc
文件頁數(shù): 63/91頁
文件大小: 0K
描述: IC FPGA VIRTEX-5 110K 1760FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 8640
邏輯元件/單元數(shù): 110592
RAM 位總計(jì): 4718592
輸入/輸出數(shù): 800
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1760-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1760-FCBGA
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-V5-ML523-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-AFX-FF1760-500-G-ND - BOARD DEV VIRTEX 5 FF1760
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
66
Table 88: Global Clock Input to Output Delay With PLL in Source-Synchronous Mode
Symbol
Description
Device
Speed Grade
Units
-3
-2
-1
LVCMOS25 Global Clock Input to Output Delay using Output Flip-Flop, 12mA, Fast Slew Rate, with PLL in Source-Synchronous Mode
TICKOFPLL_0
Global Clock and OUTFF with PLL
XC5VLX20T
N/A
4.31
4.88
ns
XC5VLX30
3.96
4.32
4.82
ns
XC5VLX30T
3.96
4.32
4.82
ns
XC5VLX50
4.05
4.40
4.91
ns
XC5VLX50T
4.05
4.40
4.91
ns
XC5VLX85
4.07
4.40
4.88
ns
XC5VLX85T
4.07
4.40
4.88
ns
XC5VLX110
4.11
4.44
4.92
ns
XC5VLX110T
4.11
4.44
4.92
ns
XC5VLX155
4.31
4.66
5.16
ns
XC5VLX155T
4.31
4.66
5.16
ns
XC5VLX220
N/A
4.85
5.29
ns
XC5VLX220T
N/A
4.85
5.29
ns
XC5VLX330
N/A
5.00
5.44
ns
XC5VLX330T
N/A
5.00
5.44
ns
XC5VSX35T
4.19
4.54
5.03
ns
XC5VSX50T
4.20
4.54
5.02
ns
XC5VSX95T
N/A
4.68
5.14
ns
XC5VSX240T
N/A
5.07
5.51
ns
XC5VTX150T
N/A
4.51
4.95
ns
XC5VTX240T
N/A
4.71
5.14
ns
XC5VFX30T
4.23
4.56
5.04
ns
XC5VFX70T
4.22
4.54
5.02
ns
XC5VFX100T
4.35
4.70
5.19
ns
XC5VFX130T
4.49
4.86
5.40
ns
XC5VFX200T
N/A
5.04
5.55
ns
Notes:
1.
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and where all
accessible IOB and CLB flip-flops are clocked by the global clock net.
2.
PLL output jitter is included in the timing calculation.
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