參數(shù)資料
型號(hào): XCF08PFSG48C
廠商: Xilinx Inc
文件頁(yè)數(shù): 18/35頁(yè)
文件大?。?/td> 0K
描述: IC PROM SRL 1.8V 8M GATE 48CSBGA
產(chǎn)品變化通告: Package Assemble Change 01/Jan/2007
標(biāo)準(zhǔn)包裝: 108
可編程類型: 系統(tǒng)內(nèi)可編程
存儲(chǔ)容量: 8Mb
電源電壓: 1.65 V ~ 2 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-BFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 48-CSP(8x9)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 601 (CN2011-ZH PDF)
其它名稱: 122-1453
Platform Flash In-System Programmable Configuration PROMs
DS123 (v2.18) May 19, 2010
Product Specification
25
R
XCFxxS VO20/VOG20 Pinout Diagram
TDO
Data Out
JTAG Serial Data Output. This pin is the serial output for all
JTAG instruction and data registers. TDO has an internal
50 k
Ω resistive pull-up to V
CCJ to provide a logic 1 to the
system if the pin is not driven.
17
VCCINT
+3.3V Supply. Positive 3.3V supply voltage for internal logic.
18
VCCO
+3.3V, 2.5V, or 1.8V I/O Supply. Positive 3.3V, 2.5V, or 1.8V
supply voltage connected to the output voltage drivers and
input buffers.
19
VCCJ
+3.3V or 2.5V JTAG I/O Supply. Positive 3.3V or 2.5V supply
voltage connected to the TDO output voltage driver and TCK,
TMS, and TDI input buffers.
20
GND
Ground
11
DNC
Do not connect. (These pins must be left unconnected.)
2, 9, 12, 14, 15, 16
X-Ref Target - Figure 11
Figure 11: VO20/VOG20 Pinout Diagram (Top View)
with Pin Names
Table 12: XCFxxS Pin Names and Descriptions (Cont’d)
Pin Name
Boundary
Scan Order
Boundary-Scan
Function
Pin Description
20-pin TSSOP
(VO20/VOG20)
VO20/VOG20
Top View
ds123_02_071304
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
D0
(DNC)
CLK
TDI
TMS
TCK
CF
OE/RESET
(DNC)
CE
VCCJ
VCCO
VCCINT
TDO
(DNC)
CEO
(DNC)
GND
(DNC)
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