參數(shù)資料
型號(hào): XCS10-3VQG100C
廠商: Xilinx Inc
文件頁(yè)數(shù): 43/83頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 5V C-TEMP 100-VQFP
產(chǎn)品變化通告: Spartan,Virtex FPGA/SCD Discontinuation 18/Oct/2010
標(biāo)準(zhǔn)包裝: 90
系列: Spartan®
LAB/CLB數(shù): 196
邏輯元件/單元數(shù): 466
RAM 位總計(jì): 6272
輸入/輸出數(shù): 77
門數(shù): 10000
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-VQFP(14x14)
Spartan and Spartan-XL FPGA Families Data Sheet
48
DS060 (v2.0) March 1, 2013
Product Specification
R
Product Obsolete/Under Obsolescence
Capacitive Load Factor
Figure 34 shows the relationship between I/O output delay
and load capacitance. It allows a user to adjust the specified
output delay if the load capacitance is different than 50 pF.
For example, if the actual load capacitance is 120 pF, add
2.5 ns to the specified delay. If the load capacitance is 20
pF, subtract 0.8 ns from the specified output delay.
Figure 34 is usable over the specified operating conditions
of voltage and temperature and is independent of the output
slew rate control.
Figure 34: Delay Factor at Various Capacitive Loads
DS060_35_080400
-2
0
20
406080
Capacitance (pF)
Delta
Dela
y
(ns)
100
120
140
-1
0
1
2
3
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