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參數(shù)資料
| 型號(hào)： | XCV812E-7BG560C |
| 廠商： | Xilinx Inc |
| 文件頁(yè)數(shù)： | 93/118頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA 1.8V C-TEMP 560-MBGA |
| 產(chǎn)品變化通告： | FPGA Family Discontinuation 18/Apr/2011 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Virtex®-E EM |
| LAB/CLB數(shù)： | 4704 |
| 邏輯元件/單元數(shù)： | 21168 |
| RAM 位總計(jì)： | 1146880 |
| 輸入/輸出數(shù)： | 404 |
| 門數(shù)： | 254016 |
| 電源電壓： | 1.71 V ~ 1.89 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 560-LBGA，金屬 |
| 供應(yīng)商設(shè)備封裝： | 560-MBGA（42.5x42.5） |
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Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
Module 3 of 4
DS025-3 (v3.0) March 21, 2014
20
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Virtex-E Extended Memory Data Sheet
The Virtex-E Extended Memory Data Sheet contains the following modules:
DS025-1, Virtex-E 1.8V Extended Memory FPGAs:
Introduction and Ordering Information (Module 1)
DS025-2, Virtex-E 1.8V Extended Memory FPGAs:
Functional Description (Module 2)
DS025-3, Virtex-E 1.8V Extended Memory FPGAs:
DC and Switching Characteristics (Module 3)
DS025-4, Virtex-E 1.8V Extended Memory FPGAs:
Pinout Tables (Module 4)
11/20/2000
1.3
Updated speed grade -8 numbers in Virtex-E Electrical Characteristics tables
(Module 3).
Updated minimums in Table 11 (Module 2), and added notes to Table 12 (Module 2).
Added to note 2 of Absolute Maximum Ratings (Module 3).
Changed all minimum hold times to –0.4 for Global Clock Set-Up and Hold for LVTTL
Standard, with DLL (Module 3).
Revised maximum TDLLPW in -6 speed grade for DLL Timing Parameters (Module 3).
04/02/2001
1.4
In Table 4, FG676 Fine-Pitch BGA — XCV405E, pin B19 is no longer labeled as VREF,
and pin G16 is now labeled as VREF.
Updated values in Virtex-E Switching Characteristics tables.
Converted data sheet to modularized format. See the Virtex-E Extended Memory Data
Sheet section.
04/19/2001
1.5
Updated values in Virtex-E Switching Characteristics tables.
07/23/2001
1.6
Changes made to SSTL symbol names in IOB Input Switching Characteristics Standard
Adjustments table.
07/26/2001
1.7
09/18/2001
1.8
Reworded power supplies footnote to Absolute Maximum Ratings table.
10/25/2001
1.9
Updated the speed grade designations used in data sheets, and added Table 1, which
shows the current speed grade designation for each device.
Updated Power-On Power Supply Requirements table.
11/09/2001
2.0
Updated the XCV405E device speed grade designation to Preliminary in Table 1.
Updated Power-On Power Supply Requirements table.
02/01/2002
2.1
Updated footnotes to the DC Input and Output Levels and DLL Clock Tolerance, Jitter,
and Phase Information tables.
07/17/2002
2.2
Data sheet designation upgraded from Preliminary to Production.
Removed mention of MIL-M-38510/605 specification.
Added link to XAPP158 from the Power-On Power Supply Requirements section.
09/10/2002
2.3
characteristics to ‘‘IOB Input Switching Characteristics’’ on page 5 and ‘‘IOB Output
12/22/2002
2.3.1
03/14/2003
2.3.2
Under Power-On Power Supply Requirements, the fastest ramp rate is no longer a
"suggested" rate.
03/21/2014
3.0
This product is obsolete/discontinued per XCN12026.
Date
Version
Revision
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AMM36DRUH | CONN EDGECARD 72POS .156 DIP SLD |
| FMM28DSEN-S243 | CONN EDGECARD 56POS .156 EYELET |
| XC5VLX110-2FF1760C | IC FPGA VIRTEX-5 110K 1760FBGA |
| XC5VLX110-2FF1153C | IC FPGA VIRTEX-5 110K 1153FBGA |
| XC6VLX240T-1FFG1156I | IC FPGA VIRTEX 6 241K 1156FFGBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCV812E-7BG560I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-7BG676C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-7BG676I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-7BG900C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-7BG900I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
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