參數(shù)資料
型號: XE8000EV121
廠商: Semtech
文件頁數(shù): 13/53頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR SX8723/24
標準包裝: 1
主要目的: 接口,傳感器至模數(shù)轉換器接口,可編程
嵌入式:
已用 IC / 零件: SX8723,SX8724,SX8725
主要屬性: 用于橋型傳感器的信號調節(jié)
次要屬性: GUI,最多 16 位,1/12 ~ 1000 可編程增益,I2C 接口
已供物品: 板,CD
產(chǎn)品目錄頁面: 585 (CN2011-ZH PDF)
相關產(chǎn)品: SX8725E083DKR-ND - IC DAS PRESSURE/TEMP SENS 12MLPD
SX8724E082DKR-ND - IC DAS PRESSURE/TEMP SENS 16MLPQ
SX8725E083CT-ND - IC DAS PRESSURE/TEMP SENS 12MLPD
SX8724E082CT-ND - IC DAS PRESSURE/TEMP SENS 16MLPQ
SX8725E083TR-ND - IC DAS PRESSURE/TEMP SENS 12MLPD
SX8724E082TR-ND - IC DAS PRESSURE/TEMP SENS 16MLPQ
ADVANCED COMMUNICATIONS & SENSING
V1.23 2009 Semtech Corp.
www.semtech.com
20
SX8724
ZoomingADC for Pressure and Temperature Sensing
Programmable Gain Amplifiers
As seen in Figure 8, the zooming function is implemented with three programmable gain amplifiers (PGA).
These are:
PGA1: coarse gain tuning
PGA2: medium gain and offset tuning
PGA3: fine gain and offset tuning. Should be set ON for high linearity data acquisition
All gain and offset settings are realized with ratios of capacitors. The user has control over each PGA activation
and gain, as well as the offset of stages 2 and 3. These functions are examined hereafter.
ENABLE[3:0]
(RegACCfg1[3:0])
Block
xxx0
ADC disabled
xxx1
ADC enabled
xx0x
PGA1 disabled
xx1x
PGA1 enabled
x0xx
PGA2 disabled
x1xx
PGA2 enabled
0xxx
PGA3 disabled
1xxx
PGA3 enabled
Table 4 - ADC & PGA Enabling
PGA1_GAIN
(RegACCfg3[7])
PGA1 Gain
GD1 (V/V)
0
1
10
Table 5 - PGA1 Gain Settings
PGA2_GAIN[1:0]
(RegACCfg2[5:4])
PGA2 Gain
GD2 (V/V)
00
1
01
2
10
5
11
10
Table 6 - PGA2 Gain Settings
PGA2_OFFSET[3:0]
(RegACCfg2[3:0])
PGA2 Offset
GDoff2 (V/V)
0000
0
0001
+0.2
0010
+0.4
0011
+0.6
0100
+0.8
0101
+1
1001
-0.2
1010
-0.4
1011
-0.6
1100
-0.8
1101
-1
Table 7 - PGA2 Offset Settings
PGA3_GAIN[6:0]
(RegACCfg3[6:0])
PGA3 Gain
GD3 (V/V)
0000000
0
0000001
1/12(=0.083)
...
0000110
6/12
...
0001100
12/12
0010000
16/12
...
0100000
32/12
...
1000000
64/12
...
1111111
127/12(=10.58)
Table 8 - PGA3 Gain Settings
PGA3_OFFSET[6:0]
(RegACCfg4[6:0])
PGA3 Offset
GDoff3 (V/V)
0000000
0
0000001
+1/12(=+0.083)
0000010
+2/12
...
0010000
+16/12
...
0100000
+32/12
...
0111111
+63/12(=+5.25)
1000000
0
1000001
-1/12(=-0.083)
1000010
-2/12
...
1010000
-16/12
...
1100000
-32/12
...
1111111
-63/12(=-5.25)
Table 9 - PGA3 Offset Settings
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