參數(shù)資料
型號: XE8000EV121
廠商: Semtech
文件頁數(shù): 15/53頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR SX8723/24
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,傳感器至模數(shù)轉(zhuǎn)換器接口,可編程
嵌入式:
已用 IC / 零件: SX8723,SX8724,SX8725
主要屬性: 用于橋型傳感器的信號調(diào)節(jié)
次要屬性: GUI,最多 16 位,1/12 ~ 1000 可編程增益,I2C 接口
已供物品: 板,CD
產(chǎn)品目錄頁面: 585 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: SX8725E083DKR-ND - IC DAS PRESSURE/TEMP SENS 12MLPD
SX8724E082DKR-ND - IC DAS PRESSURE/TEMP SENS 16MLPQ
SX8725E083CT-ND - IC DAS PRESSURE/TEMP SENS 12MLPD
SX8724E082CT-ND - IC DAS PRESSURE/TEMP SENS 16MLPQ
SX8725E083TR-ND - IC DAS PRESSURE/TEMP SENS 12MLPD
SX8724E082TR-ND - IC DAS PRESSURE/TEMP SENS 16MLPQ
ADVANCED COMMUNICATIONS & SENSING
V1.23 2009 Semtech Corp.
www.semtech.com
22
SX8724
ZoomingADC for Pressure and Temperature Sensing
ADC Characteristics
The main performance characteristics of the ADC (resolution, conversion time, etc.) are determined by three
programmable parameters. The setting of these parameters and the resulting performances are described later.
Over-sampling frequency fs
Over-Sampling Ratio OSR
Number of Elementary Conversions NELCONV
Conversion Sequence
A conversion is started each time the bit START or the bit DEF is set. As depicted in Figure 11, a complete
analog-to-digital conversion sequence is made of a set of NELCONV elementary incremental conversions and a
final quantization step. Each elementary conversion is made of (OSR+1) over-sampling periods Ts=1/fs, i.e.:
(
)
fs
OSR
T
ELCONV
1
+
=
(s)
Equation 12
The result is the mean of the elementary conversion results. An important feature is that the elementary
conversions are alternatively performed with the offset of the internal amplifiers contributing in one direction and
the other to the output code. Thus, converter internal offset is eliminated if at least two elementary sequences
are performed (i.e. if NELCONV
≥ 2). A few additional clock cycles are also required to initiate and end the
conversion properly.
Figure 11 - Analog-to-Digital Conversion Sequence
Note:
The internal bandgap reference state may be forced High or Low, or may be set to toggle during conversion at either the same rate or half
the rate of the Elementary Conversion. This may be useful to help eliminate bandgap related internal offset voltage and 1/fs noise.
Over-Sampling Frequency
The word FIN[1:0] (see Table 10) is used to select the over-sampling frequency fs. The over-sampling frequency
is derived from the 4MHz oscillator clock.
FIN[1:0]
(RegACCfg2[7:6])
Over-Sampling Frequency fs (Hz)
00
62.5 kHz
01
125 kHz
10
250 kHz
11
500 kHz
Table 10 - Over-Sampling Frequency Settings
Init
Elementary
Conversion
Elementary
Conversion
Elementary
Conversion
Elementary
Conversion
End
Conversion index
Offset
1
2
N
ELCONV-1
N
ELCONV
Conversion
Result
+
-
+
-
T
CONV
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