FIGURE 22. TRANSMIT R
參數(shù)資料
型號: XR16L2550IL-F
廠商: Exar Corporation
文件頁數(shù): 35/44頁
文件大小: 0K
描述: IC UART FIFO 16B DUAL 32QFN
標(biāo)準(zhǔn)包裝: 490
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
規(guī)程: RS232
電源電壓: 2.25 V ~ 5.5 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
FIGURE 22. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE DISABLED] FOR CHANNELS A & B
TX
TXRDY#
IOW#
INT*
TXDMA#
D0:D7
S
D0:D7
T
D0:D7
S
D0:D7
S
T
D0:D7
S
T
D0:D7
S
T
Start
Bit
Stop
Bit
T
WRI
(Unloading)
(Loading data
into FIFO)
Last Data Byte
Transmitted
TX FIFO no
longer empty
Data in
TX FIFO
Empty
T
WT
T
SRT
TX FIFO
Empty
T
S
T
SI
ISR is read
IER[1]
enabled
*INT is cleared when the ISR is read or when there is at least one character in the FIFO.
FIGURE 23. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE ENABLED] FOR CHANNELS A & B
TX
TXRDY#
IOW#
INT*
TXDMA
D0:D7
S
D0:D7
T
D0:D7
S
D0:D7
S
T
D0:D7
S
T
D0:D7
S
T
Start
Bit
Stop
Bit
T
WRI
(Unloading)
(Loading data
into FIFO)
Last Data Byte
Transmitted
TX FIFO no
longer empty
TX FIFO
Empty
TX FIFO
Empty
T
S
T
SI
ISR is read
IER[1]
enabled
*INT is cleared when the ISR is read or when there is at least one character in the FIFO.
At least 1
empty location
in FIFO
T
SRT
TX FIFO
Full
T
WT
XR16L2550
40
LOW VOLTAGE DUART WITH 16-BYTE FIFO
REV. 1.1.3
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