參數(shù)資料
型號： XR16L2552
廠商： Exar Corporation
英文描述： 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
中文描述： 2.25V至5.5V的杜阿爾特16字節(jié)FIFO
文件頁數(shù)： 3/47頁
文件大?。?/td> 748K
代理商： XR16L2552
xr
REV. 1.1.1
XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
3
PIN DESCRIPTIONS
Pin Description
N
AME
48-TQFP
P
IN
#
44-PLCC
P
IN
#
T
YPE
D
ESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
10
9
4
15
14
10
I
Address data lines [2:0]. These 3 address lines select one of the internal reg-
isters in UART channel A/B during a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
3
2
1
48
47
46
45
44
9
8
7
6
5
4
3
2
I/O
Data bus lines [7:0] (bidirectional).
IOR#
20
24
I
Input/Output Read Strobe (active low). The falling edge instigates an internal
read cycle and retrieves the data byte from an internal register pointed to by
the address lines [A2:A0]. The data byte is placed on the data bus to allow the
host processor to read it on the rising edge.
IOW#
15
20
I
Input/Output Write Strobe (active low). The falling edge instigates an internal
write cycle and the rising edge transfers the data byte on the data bus to an
internal register pointed by the address lines.
CS#
13
18
I
UART chip select (active low). This function selects channel A or B in accor-
dance with the logical state of the CHSEL pin. This allows data to be trans-
ferred between the user CPU and the L2552.
CHSEL
11
16
I
Channel Select - UART channel A or B is selected by the logical state of this
pin when the CS# pin is a logic 0. A logic 0 on the CHSEL selects the UART
channel B while a logic 1 selects UART channel A. Normally, CHSEL could
just be an address line from the user CPU such as A3. Bit-0 of the Alternate
Function Register (AFR) can temporarily override CHSEL function, allowing
the user to write to both channel register simultaneously with one write cycle
when CS# is low. It is especially useful during the initialization routine.
INTA
30
34
O
UART channel A Interrupt output (active high). A logic high indicates channel
A is requesting for service.
INTB
12
17
O
UART channel B Interrupt output (active high). A logic high indicates channel
B is requesting for service.
TXRDYA#
43
1
O
UART channel A Transmitter Ready (active low). The output provides the TX
FIFO/THR status for transmit channel A. If it is not used, leave it uncon-
nected.
RXRDYA#
31
-
O
UART channel A Receiver Ready (active low). This output provides the RX
FIFO/RHR status for receive channel A. This pin is only available on the 48-
pin TQFP package. If it is not used, leave it unconnected.
TXRDYB#
28
32
O
UART channel B Transmitter Ready (active low). The output provides the TX
FIFO/THR status for transmit channel B. If it is not used, leave it uncon-
nected.
相關(guān)PDF資料
PDF描述
XR16L2750CJ 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
XR16L2750CM 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
XR16L2750IJ 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
XR16L2750IM 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
XR16L2750 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR16L2552IJ 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:
XR16L2552IJ-0A-EB 功能描述:UART 接口集成電路 Supports L2552 44 ld PLCC, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16L2552IJ-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16L2552IJTR 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:
XR16L2552IJTR-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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