REV. 1.2.3 50 NOTICE EXAR Corporation reserves the right to make changes t" />
參數(shù)資料
型號(hào): XR16L2751CMTR-F
廠商: Exar Corporation
文件頁(yè)數(shù): 46/50頁(yè)
文件大小: 0K
描述: IC UART FIFO 64B DUAL 48TQFP
標(biāo)準(zhǔn)包裝: 1,500
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.25 V ~ 5.5 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 帶卷 (TR)
XR16L2751
2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE
REV. 1.2.3
50
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2010 EXAR Corporation
Datasheet April 2010.
Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
REVISION HISTORY
DATE
REVISION
DESCRIPTION
November 2001
Rev P1.0.0
Prelim data sheet.
March 2002
Rev P1.1.0
Corrected INT output descriptions and reset state. Clarified MCR bit-3 description.
Added 68 Mode (Motorola) Data bus timing specs. Renamed Sclk to Bclk. Changed
A0-A7 in Figures
16 through 19 to A0-A2.
September 2002
Rev 1.0.0
Release into production. Clarified RTS# pin descriptions, XTAL1 pin description,
external clock description, auto RS485 half-duplex control description, EMSR bit-3
description and updated 2.5 V, ICC and ISLEEP DC Electrical Characteristics.
March 2003
Rev 1.1.0
Updated AC Electrical Characteristics.
August 2004
Rev 1.2.0
Added Device Status to Ordering Information. Clarified pin descriptions- changed
from using logic 1 and logic 0 to HIGH (VCC) and LOW (GND) for input and output
pin descriptions.
April 2005
Rev 1.2.1
Updated the Data Access Times (TRDV and TRDA) in AC Electrical Characteristics.
October 2005
Rev 1.2.2
Clarified Wake-up Indicator interrupt in Sleep Mode description in
April 2010
Rev 1.2.3
Corrected auto RS-485 half duplex direction control feature. It does not support turn-
around delay.
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