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參數(shù)資料
| 型號： | XR16L2751IM-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 13/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 64B DUAL 48TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 2.25 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1452 XR16L2751IM-F-ND |
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XR16L2751
2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE
REV. 1.2.3
20
2.20
Sleep Mode with Wake-Up Indicator and PowerSave Feature
The 2751 supports low voltage system designs, hence, a sleep mode with auto wake-up and PowerSave
feature is included to reduce power consumption when the device is not actively used.
2.20.1
Sleep Mode
All of these conditions must be satisfied for the 2751 to enter sleep mode:
■ no interrupts pending for both channels of the 2751 (ISR bit-0 = 1)
■ sleep mode of both channels are enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pins are idling HIGH
The 2751 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The 2751 resumes normal operation by any of the following when PowerSave mode is disabled (pin 12 at
ground):
■ a receive data start bit transition (HIGH to LOW)
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the sleep mode is enabled and the 2751 is awakened by one of the conditions described above, an interrupt
is issued by the 2751 to signal to the CPU that it is awake. The lower nibble of the interrupt source register
(ISR) will read a value of 0x1 for this interrupt and reading the ISR clears this interrupt. Since the same value
(0x1) is also used to indicate no pending interrupt, users should exercise caution while using the sleep mode.
The 2751 will return to the sleep mode automatically after all interrupting conditions have been serviced and
cleared. If the 2751 is awakened by the modem inputs, a read to the MSR is required to reset the modem
inputs. In any case, the sleep mode will not be entered while an interrupt is pending from channel A or B. The
2751 will stay in the sleep mode of operation until it is disabled by setting IER bit-4 to a logic 0.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. Also, it is important to keep
RX A/B inputs idling HIGH or “marking” condition during sleep mode to avoid receiving a “break” condition
upon the restart. This may occur when the external interface transceivers (RS-232, RS-485 or another type)
are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the designer can use a
47k-100k ohm pull-up resistor on the RXA and RXB pins.
2.20.2
PowerSave Feature
If the address lines, data bus lines, IOW#, IOR#, CSA#, CSB#, and modem input lines remain steady when the
2751 is in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on page 40. If the input lines are floating or are toggling while the 2751 is in sleep mode, the
current can be up to 100 times more. If not using the PowerSave feature, then an external buffer would be
required to keep the address and data bus lines from toggling or floating to achieve the low current. But if the
PowerSave feature is enabled (pin 12 connected to VCC), this will eliminate the need for an external buffer by
internally isolating the address, data and control signals (see Figure 1 on page 1) from other bus activities that
could cause wasteful power drain. The 2751 enters PowerSave mode when pin 12 is connected to VCC and
the 2751 is in sleep mode (see Sleep Mode section above).
Since PowerSave mode isolates the address, data and control signals, the device will wake-up by:
■ a receive data start bit transition (HIGH to LOW)
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
The 2751 will return to the PowerSave mode automatically after a read to the MSR (to reset the modem inputs)
and all interrupting conditions have been serviced and cleared. The 2751 will stay in the PowerSave mode of
operation until it is disabled by setting IER bit-4 to a logic 0 and/or the PowerSave pin is connected to GND.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XR16L2751IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 2.5V/3.3V/5V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16L2751IMTR-F |
| XR16L2752 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART WITH 64-BYTE FIFO |
| XR16L2752CJ | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART WITH 64-BYTE FIFO |
| XR16L2752CJ-0A-EB | 功能描述:UART 接口集成電路 Supports L2750 44 ld PLCC, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L2752CJ-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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