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參數(shù)資料
型號(hào): XR16M2752IJ-0B-EB
廠(chǎng)商: Exar Corporation
文件頁(yè)數(shù): 39/51頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR M2752-B 44PLCC
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16M2752
44
1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.0.0
FIGURE 17. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
FIGURE 18. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
RX
RXRDY#
IOR#
INT
D0:D7
Start
Bit
D0:D7
Stop
Bit
D0:D7
T
SSR
1 Byte
in RHR
Active
Data
Ready
Active
Data
Ready
Active
Data
Ready
1 Byte
in RHR
1 Byte
in RHR
T
SSR
T
SSR
RXNFM
T
RR
T
RR
T
RR
T
SSR
T
SSR
T
SSR
(Reading data
out of RHR)
TX
TXRDY#
IOW#
INT*
D0:D7
Start
Bit
D0:D7
Stop
Bit
D0:D7
T
WT
TXNonFIFO
T
WT
T
WT
T
WRI
T
WRI
T
WRI
T
SRT
T
SRT
T
SRT
*INT is cleared when the ISR is read or when data is loaded into the THR.
ISR is read
(Loading data
into THR)
IER[1]
enabled
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