- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16523 > XR16V2752IL-0B-EB (Exar Corporation)EVAL BOARD FOR V2752 32QFN PDF資料下載
參數(shù)資料
| 型號： | XR16V2752IL-0B-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 28/51頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR V2752 32QFN |
| 標準包裝： | 1 |
| 系列： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
XR16V2752
34
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.0.2
EMSR[5:4]: Extended RTS Hysteresis
EMSR[6]: LSR Interrupt Mode
Logic 0 = LSR Interrupt Delayed (for 16C2550 compatibility, default). LSR bits 2, 3, and 4 will generate an
interrupt when the character with the error is in the RHR.
Logic 1 = LSR Interrupt Immediate. LSR bits 2, 3, and 4 will generate an interrupt as soon as the character is
received into the FIFO.
EMSR[7]: 16X Sampling Rate Mode
Logic 0 = 8X Sampling Rate.
Logic 1 = 16X Sampling Rate (default).
4.11
FIFO Level Register (FLVL) - Read-Only
The FIFO Level Register replaces the Scratchpad Register (during a Read) when FCTR[6] = 1. Note that this is
not identical to the FIFO Data Count Register which can be accessed when LCR = 0xBF.
FLVL[7:0]: FIFO Level Register
This register provides the FIFO counter level for the RX FIFO or the TX FIFO or both depending on EMSR[1:0].
See Table 12 for details.
4.12
Baud Rate Generator Registers (DLL, DLM and DLD) - Read/Write
These registers make-up the value of the baud rate divisor. The concatenation of the contents of DLM and
DLL is a 16-bit value is then added to DLD/16 to achieve the fractional baud rate divisor. DLD must be enabled
via EFR bit-4 before it can be accessed. SEE”PROGRAMMABLE BAUD RATE GENERATOR WITH
4.13
Alternate Function Register (AFR) - Read/Write
This register is used to select specific modes of MF# operation and to allow both UART register sets to be
written concurrently.
TABLE 13: AUTO RTS HYSTERESIS
EMSR
BIT-5
EMSR
BIT-4
FCTR
BIT-1
FCTR
BIT-0
RTS#
HYSTERESIS
(CHARACTERS)
0
1
0
1
0
1
0
±4
±6
±8
0
1
0
1
0
1
0
1
±8
±16
±24
±32
1
0
1
0
1
0
1
±40
±44
±48
±52
1
0
1
0
1
0
1
±12
±20
±28
±36
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EEU-FR1J271L | CAP ALUM 270UF 63V 20% RADIAL |
| UPA0J561MPD1TD | CAP ALUM 560UF 6.3V 20% RADIAL |
| H3AKH-3036G | IDC CABLE - HSC30H/AE30G/HPK30H |
| EBM28DTAD-S189 | CONN EDGECARD 56POS R/A .156 SLD |
| MCP1318T-46LE/OT | IC SUPERVISOR 4.6V PP/PP SOT23-5 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16V2752IL32 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO |
| XR16V2752IL-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16V2752ILTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 2.5V/3.3V 32-Pin QFN EP T/R 制造商:Exar Corporation 功能描述:XR16V2752ILTR-F |
| XR16V554 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO |
| XR16V554_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。