參數(shù)資料
型號(hào)： XR16V2752IL-0B-EB
廠商： Exar Corporation
文件頁(yè)數(shù)： 34/51頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR V2752 32QFN
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16V2752
4
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.0.2
RXA
24
39
I
UART channel A Receive Data or infrared receive data. Normal receive
data input must idle HIGH. The infrared receiver pulses typically idles
LOW but can be inverted by software control prior going in to the decoder,
see MCR[6] and FCTR[2]. If this pin is not used, tie it to VCC or pull it high
via a 100k ohm resistor.
RTSA#
22
36
O
UART channel A Request-to-Send (active low) or general purpose output.
This output must be asserted prior to using auto RTS flow control, see
EFR[6], MCR[1], FCTR[1:0], EMSR[5:4] and IER[6]. For auto RS485 half-
duplex direction control, see FCTR[3] and EMSR[3].
CTSA#
25
40
I
UART channel A Clear-to-Send (active low) or general purpose input. It
can be used for auto CTS flow control, see EFR[7], and IER[7]. This input
should be connected to VCC when not used.
DTRA#
-
37
O
UART channel A Data-Terminal-Ready (active low) or general purpose
output. If this pin is not used, leave it unconnected.
DSRA#
-
41
I
UART channel A Data-Set-Ready (active low) or general purpose input.
This input should be connected to VCC when not used. This input has no
effect on the UART.
CDA#
-
42
I
UART channel A Carrier-Detect (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect
on the UART.
RIA#
-
43
I
UART channel A Ring-Indicator (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect
on the UART.
MFA#
-
35
O
Multi-Function Output Channel A. This output pin can function as the
OP2A#, BAUDOUTA#, or RXRDYA# pin. One of these output signal func-
tions can be selected by the user programmable bits 1-2 of the Alternate
Function Register (AFR). These signal functions are described as follows:
1) OP2A# - When OP2A# (active low) is selected, the MF# pin is LOW
when MCR bit-3 is set to a logic 1 (see MCR bit-3). MCR bit-3 defaults to a
logic 0 condition after a reset or power-up.
2) BAUDOUTA# - When BAUDOUTA# function is selected, the 16X Baud
rate clock output is available at this pin.
3) RXRDYA# - RXRDYA# (active low) is intended for monitoring DMA data
transfers. See
Table 2 for more details.
TXB
16
26
O
UART channel B Transmit Data or infrared encoder data. Standard trans-
mit and receive interface is enabled when MCR[6] = 0. In this mode, the
TX signal will be HIGH during reset or idle (no data). Infrared IrDA transmit
and receive interface is enabled when MCR[6] = 1. In the Infrared mode,
the inactive state (no data) for the Infrared encoder/decoder interface is
LOW. If it is not used, leave it unconnected.
RXB
15
25
I
UART channel B Receive Data or infrared receive data. Normal receive
data input must idle HIGH. The infrared receiver pulses typically idles
LOW but can be inverted by software control prior going in to the decoder,
see MCR[6] and FCTR[2]. If this pin is not used, tie it to VCC or pull it high
via a 100k ohm resistor.
Pin Description
NAME
32-QFN
PIN #
44-PLCC
PIN #
TYPE
DESCRIPTION
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