參數(shù)資料
型號(hào)： XR16V598IQ-0A-EVB
廠商： Exar Corporation
文件頁(yè)數(shù)： 30/58頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR16V598-A 100QFP
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16V598
36
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO
REV. 1.0.3
FCR[3]: DMA Mode Select
This bit has no effect since TXRDY and RXRDY pins are not available in this device. It is provided for legacy
software compatibility.
Logic 0 = Set DMA to mode 0 (default).
Logic 1 = Set DMA to mode 1.
FCR[2]: TX FIFO Reset
This bit is only active when FCR bit-0 is active.
Logic 0 = No transmit FIFO reset (default).
Logic 1 = Reset the transmit FIFO pointers and FIFO level counter logic (the transmit shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
FCR[1]: RX FIFO Reset
This bit is only active when FCR bit-0 is active.
Logic 0 = No receive FIFO reset (default).
Logic 1 = Reset the receive FIFO pointers and FIFO level counter logic (the receive shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
FCR[0]: TX and RX FIFO Enable
Logic 0 = Disable the transmit and receive FIFO (default).
Logic 1 = Enable the transmit and receive FIFOs. This bit must be set to logic 1 when other FCR bits are
written or they will not be programmed.
4.6
Line Control Register (LCR) - Read/Write
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL, DLM, DLD) enable.
Logic 0 = Data registers are selected (default).
Logic 1 = Divisor latch registers (DLL, DLM and DLD) are selected.
TABLE 14: TRANSMIT AND RECEIVE FIFO TRIGGER TABLE AND LEVEL SELECTION
FCR
BIT-7
FCR
BIT-6
FCR
BIT-5
FCR
BIT
-4
RECEIVE TRIGGER
LEVEL
TRANSMIT
TRIGGER LEVEL
COMPATIBILITY
0
1
0
1
0
1
0
1
0
1
0
1
1(default)
4
8
14
1(default)
4
8
14
16C550, 16C2550,
16C2552, 16C554,
16C580 compatible
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XR16V598IQ-0B-EVB 功能描述:界面開(kāi)發(fā)工具 Supports V598 100 LD QFP, PCI Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
XR16V598IQ100 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO
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