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參數(shù)資料
| 型號： | XR16V698IQ-0B-EVB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 31/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR16V698-B 100QFP |
| 標準包裝： | 1 |
| 系列： | * |
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XR16V698
37
REV. 1.0.3
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
LCR[6]: Transmit Break Enable
When enabled the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition. (default)
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
LCR BIT-5 = logic 0, parity is not forced (default).
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even the number of logic 1’s in the transmitted character.
The receiver must be programmed to check the same format.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See Table 15 above for parity selection summary.
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
TABLE 15: PARITY PROGRAMMING
LCR BIT-5
LCR BIT-4
LCR BIT-3
PARITY SELECTION
X
0
No parity
0
1
Odd parity
0
1
Even parity
1
0
1
Force parity to mark, “1”
1
Force parity to space, “0”
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相關代理商/技術參數(shù) |
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| XR16V698IQ100 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO |
| XR16V698IQ100-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16V698IQ100TR-F | 制造商:Exar Corporation 功能描述:UART 8-CH 32Byte FIFO 2.5V/3.3V 100-Pin PQFP T/R 制造商:Exar Corporation 功能描述:XR16V698IQ100TR-F |
| XR16V794 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL |
| XR16V794_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL |
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