參數(shù)資料
型號(hào)： XR16V698IQ-0B-EVB
廠商： Exar Corporation
文件頁(yè)數(shù)： 57/58頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR16V698-B 100QFP
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16V698
8
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
REV. 1.0.3
2.4
INT# Ouput
The INT# interrupt output changes according to the operating mode and enhanced features setup. Table 2
and 3 summarize the operating behavior for the transmitter and receiver.
2.5
Crystal Oscillator
The 698 includes an on-chip oscillator. The crystal oscillator provides the system clock to the Baud Rate
Generators (BRG) in each of the 8 UARTs, the 16-bit general purpose timer/counter and internal logics. XTAL1
is the input to the oscillator or external clock buffer input with XTAL2 pin being the output. For programming
The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,
fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100ppm frequency
tolerance) connected externally between the XTAL1 and XTAL2 pins (see Figure 3). Alternatively, an external
clock can be connected to the XTAL1 pin to clock the internal 8 baud rate generators for standard or custom
rates. The typical oscillator connections are shown in Figure 3. For further reading on oscillator circuit please
see application note DAN108 on EXAR’s web site.
TABLE 2: INT# PIN OPERATION FOR TRANSMITTER
Auto RS-485
Mode
FCR BIT-0 = 0
(FIFO DISABLED)
FCR BIT-0 = 1
(FIFO ENABLED)
NO
HIGH = a byte in THR
LOW = THR empty
HIGH = FIFO above trigger level
LOW = FIFO below trigger level or FIFO empty
YES
HIGH = a byte in THR
LOW = transmitter empty
HIGH = FIFO above trigger level
LOW = FIFO below trigger level or transmitter empty
TABLE 3: INT# PIN OPERATION FOR RECEIVER
FCR BIT-0 = 0
(FIFO DISABLED)
FCR BIT-0 = 1
(FIFO ENABLED)
HIGH = no data
LOW = 1 byte
HIGH = FIFO below trigger level
LOW = FIFO above trigger level
FIGURE 3. TYPICAL OSCILLATOR CONNECTIONS
C1
22-47pF
C2
22-47pF
24 MHz
XTAL1
XTAL2
R=300K to 400K
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