XR17C152
á
5V PCI BUS DUAL UART
REV. 1.2.0
54
FIGURE 19. DEVICE CONFIGURATION REGISTERS, UART REGISTERS AND TRANSMIT DATA BURST WRITE OPERA-
TION
CLK
FRAM E #
AD [31:0]
C/BE[3:0]#
TRDY #
IR DY#
DE VS EL#
1
23
4
Add ress
Bus
CMD
B yte E nable# = D W O R D
PC I_BW R
5
6
7
PA R
PE RR #
8
No te : P ERR# a nd SE R R a re o ptio n al in a bu s ta rg e t a p plica tion .
Even Parity is on AD [31:0], C /BE[3:0]#, and PAR
Ho st
Target
Ho st
Target
Add ress
Parity
SE RR #
Target
Active
Data
Parity
Active
91 0
Data
DW O R D
D a ta D W O R D
DW
O
R
D
T
R
AN
SF
E
R
DW
O
R
D
T
R
AN
SF
E
R
DW
O
R
D
T
R
AN
SF
E
R
DW
O
R
D
T
R
AN
SF
E
R
DW
O
R
D
T
R
AN
SF
E
R
Data
Parity
Data
Parity
Data
Parity
Data
Parity
Active
11
Data
DW O R D
Data
DW O R D
Data
DW O R D