REV. 1.3.2 5V PCI BUS QUAD UART 19 MPIOINT [7:0] (default 0x00) Enable multipurpose input pin interrupt. If the MPIO pin is selecte" />
參數(shù)資料
型號: XR17C154CV-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 11/62頁
文件大小: 0K
描述: EVAL BOARD FOR XR17C154-A 144TQF
標準包裝: 1
系列: *
xr
XR17C154
REV. 1.3.2
5V PCI BUS QUAD UART
19
MPIOINT [7:0] (default 0x00)
Enable multipurpose input pin interrupt. If the MPIO pin is selected by MPIOSEL as input then bit-0 enables
input pin 0 for interrupt, and bit-7 enables input pin 7. No interrupt is enable if the pin is selected to be an
output. The interrupt is edge sensing and determined by MPIOINV and MPIOLVL registers. The MPIO interrupt
clears after a read to register MPIOLVL. The combination of MPIOLVL and MPIOINV determines the interrupt
being active low or active high, it’s level trigger. Logic 0 (default) disables the pin’s interrupt and logic 1 enables
it.
FIGURE 6. MULTIPURPOSE INPUT/OUTPUT INTERNAL CIRCUIT
MPIO
Pin [7:0]
MPIOLVL [7:0]
Read Input Level
MPIOINT [7:0]
Rising Edge
Detection
INT
OR
AND
1
0
MPIOSEL [7:0]
(Select Input=1, Output=0 )
MPIO3T [7:0]
(3-state Enable =1)
MPIOLVL [7:0]
(Output Level)
MPIOINV [7:0]
(Input Inversion Enable =1)
MPIOCKT
MPIO6
MPIO7
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIOINT Register
Multipurpose Input/Output Interrupt Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
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