參數(shù)資料
型號: XR16V798IQ-0B-EVB
廠商: Exar Corporation
文件頁數(shù): 1/56頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR16V798-B 100QFP
設(shè)計資源: XR17V798/794 Eval Board Schematic
標準包裝: 1
系列: *
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16V798
HIGH PERFORMANCE 2.25V TO 3.6V OCTAL UART WITH FRACTIONAL
JULY 2008
REV. 1.0.1
GENERAL DESCRIPTION
The XR16V7981 (798), is a 2.25V to 3.6V octal
Universal Asynchronous Receiver and Transmitter
(UART) with 5V tolerant serial (modem) inputs. The
highly
integrated
device
is
designed
for
high
bandwidth requirement in communication systems.
The global interrupt source register provides a
complete interrupt status indication for all 8 channels
to speed up interrupt parsing. Each UART has its own
16C550 compatible set of configuration registers, TX
and RX FIFOs of 64 bytes, fully programmable
transmit and receive FIFO trigger levels, TX and RX
FIFO level counters, automatic RTS/CTS or DTR/
DSR hardware flow control with programmable
hysteresis,
autoamtic
software
(Xon/Xoff)
flow
control, RS-485 half-duplex direction control with
programmable turn-around delay, Intel or Motorola
bus interface and sleep mode with a wake-up
indicator.
NOTE: Covered by US patents #5,649,122 and #5,949,787
APPLICATIONS
Remote Access Servers
Ethernet Network to Serial Ports
Network Management
Factory Automation and Process Control
Point-of-Sale Systems
Multi-port RS-232/RS-422/RS-485 Cards
FEATURES
2.25V to 3.6V with 5V Tolerant Serial Inputs
Single Interrupt output for all 8 UARTs
A Global Interrupt Source Register for all 8 UARTs
5G “Flat” UART Registers for easier programming
Simultaneous Initialization of all UART channels
A General Purpose Command-driven 16-bit
Timer/counter
Sleep Mode with Wake-up Indication
Highly Integrated Device for Space Saving
Each UART is independently controlled with:
16C550 Compatible 5G Register Set
64-byte Transmit and Receive FIFOs
Fractional Baud Rate Generator
Transmit and Receive FIFO Level Counters
Programmable TX and RX FIFO Trigger Level
Automatic RTS/CTS or DTR/DSR Flow Control
Automatic Xon/Xoff Software Flow Control
RS485 HDX Control Output with Selectable
Turn-around Delay
Infrared (IrDA 1.0) Data Encoder/Decoder
Programmable Data Rate with Prescaler
Up to 8 Mbps Serial Data Rate
Pin compatible to XR16L788. Same 100-pin QFP
Package (14x20x3 mm)
FIGURE 1. BLOCK DIAGRAM
TMRCK
Device
Configuration
Registers
XTAL1
XTAL2
Crystal Osc/Buffer
UART Channel 0
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
Data Bus
Interface
RST#
A7:A0
IOR#
IOW#
CS#
INT#
TX7, RX7, DTR7#,
DSR7#, RTS7#,
CTS7#, CD7#, RI7#
UART Channel 7
UART Channel 6
UART Channel 5
UART Channel 4
UART Channel 3
UART Channel 2
UART Channel 1
16-bit
Timer/Counter
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
D7:D0
16/68#
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