XR17D154
xr
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
REV. 1.2.2
14
TABLE 4: DEVICE CONFIGURATION REGISTERS SHOWN IN BYTE ALIGNMENT
ADDRESS
[A7:A0]
REGISTER
READ/WRITE COMMENT
RESET STATE
Ox080
INT0 [7:0]
Read-only Interrupt [3:0], Reserved [7:4]
Bits 7-0 = 0x00
Ox081
INT1 [15:8]
Read-only
Bits 7-0 = 0x00
Ox082
INT2 [23:16]
Read-only [3:0], Reserved [7:4]
Bits 7-0 = 0x00
Ox083
INT3 [31:24]
Reserved
Bits 7-0 = 0x00
Ox084
TIMERCNTL
Read/Write Timer Control
Bits 7-0 = 0x00
Ox085
TIMER
Reserved
Bits 7-0 = 0x00
Ox086
TIMERLSB
Read/Write Timer LSB
Bits 7-0 = 0x00
Ox087
TIMERMSB
Read/Write Timer MSB
Bits 7-0 = 0x00
Ox088
8XMODE
Read/Write
Bits 7-0 = 0x00
Ox089
REGA
Reserved
Bits 7-0 = 0x00
Ox08A
RESET
Write-only Self clear bits after executing Reset [3:0]
Bits 7-0 = 0x00
Ox08B
SLEEP
Read/Write Sleep mode [3:0]
Bits 7-0 = 0x00
Ox08C
DREV
Read-only Device revision
Bits 7-0 = 0x04
Ox08D
DVID
Read-only Device identification
Bits 7-0 = 0x24
Ox08E
REGB
Read/Write
Bits 7-0 = 0x00
Ox08F
MPIOINT
Read/Write MPIO interrupt mask
Bits 7-0 = 0x00
Ox090
MPIOLVL
Read/Write MPIO level control
Bits 7-0 = 0x00
Ox091
MPIO3T
Read/Write MPIO output control
Bits 7-0 = 0x00
Ox092
MPIOINV
Read/Write MPIO input polarity select
Bits 7-0 = 0x00
Ox093
MPIOSEL
Read/Write MPIO select
Bits 7-0 = 0xFF
TABLE 5: DEVICE CONFIGURATION REGISTERS SHOWN IN DWORD ALIGNMENT
ADDRESS
REGISTER
BYTE 3 [31:24]
BYTE 2 [23:16]
BYTE 1 [15:8]
BYTE 0 [7:0]
0x080
-083
INTERRUPT (read-only)
INT3
INT2
INT1
INT0
0x084-087
TIMER (read/write)
TIMERMSB
TIMERLSB
TIMER
(reserved)
TIMERCNTL
0x088-08B
ANCILLARY1 (read/write)
SLEEP
RESET
REGA
(reserved)
8XMODE
0x08C-08F
ANCILLARY2 (read-only)
MPIOINT
REGB
DVID
DREV
0x090-093
MPIO (read/write)
MPIOSEL
MPIOINV
MPIO3T
MPIOLVL