REV. 1.0.4 MPIOSEL [15:0](default 0xFF) The MPIOSEL register defines the MPIOs as either an" />
參數(shù)資料
型號(hào): XR17V358IB-E8-EVB
廠商: Exar Corporation
文件頁數(shù): 24/68頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR17V358-E8
產(chǎn)品培訓(xùn)模塊: PCIe UARTs
UART Product Overview
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,UART
嵌入式:
已用 IC / 零件: XR17V358
已供物品:
相關(guān)產(chǎn)品: 1016-1294-ND - IC UART PCIE OCTAL 176FPBGA
其它名稱: 1016-1296
XR17V358
30
HIGH PERFORMANCE OCTAL PCI EXPRESS UART
REV. 1.0.4
MPIOSEL [15:0](default 0xFF)
The MPIOSEL register defines the MPIOs as either an input or output. A logic 1 (default) defines the pin for
input and a logic 0 for output.
MPIO6
MPIO7
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIOSEL Register
Multipurpose Input/Output Selection
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
MPIOOD [15:0] (default 0x00)
The MPIO outputs can behave as an open-drain output by the MPIOOD register. When the MPIOOD register is
a logic 0 (default), the MPIO is not an open-drain output. A logic 1 enables the MPIO as an open-drain output.
This register has no effect, when the MPIO is an input.
MPIO 6
MPIO 7
MPIO 5 MPIO 4 MPIO 3 MPIO 2 MPIO 1 MPIO 0
M P IO O D R egister
M ultipurpose O pen-D rain O utput E nable
Bit-7 Bit-6 Bit-5 B it-4 Bit-3 Bit-2 Bit-1 B it-0
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